<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic PowerPC VLE GCC: Compiler Bug, invalid Instruction emitted in S32 Design Studio</title>
    <link>https://community.nxp.com/t5/S32-Design-Studio/PowerPC-VLE-GCC-Compiler-Bug-invalid-Instruction-emitted/m-p/1222845#M7206</link>
    <description>&lt;P&gt;Dear NXP Team,&lt;/P&gt;&lt;P&gt;Compiling a C source file using your GCC for PPC VLE we encountered a problem. The compiler successfully completed but the assembler rejected the generated assembly file in the second pass. Inspection of the assembly listing revealed an invalid instruction, which had been emitted by the compiler pass.&lt;/P&gt;&lt;P&gt;The C compiler is:&lt;/P&gt;&lt;P&gt;"powerpc-eabivle-gcc.exe (GCC) 4.9.4 20160726 (Sat May 27 11:09:55 CDT 2017 build.sh rev=gd8b6c20 s=F494 ELe200 -V release_gd8b6c20_build_Fed_ELe200_ML0)"&lt;/P&gt;&lt;P&gt;This is the command line. We have removed some -I&amp;lt;path&amp;gt; switches. The problem appeared with -O3 and likely with -Os but not with -O2:&lt;/P&gt;&lt;P&gt;powerpc-eabivle-gcc.exe -c -mcpu=e200z4 -mbig-endian -mvle -misel=yes -meabi -msdata=default -G8 -mregnames -fshort-double -fsingle-precision-constant -mhard-float -mno-string -fno-common -fno-exceptions -ffunction-sections -fdata-sections -fshort-enums -fdiagnostics-show-option -finline-functions -fmessage-length=0 -fzero-initialized-in-bss -fno-tree-loop-optimize -Wall -Wno-main -Wno-old-style-declaration -Wextra -Wstrict-overflow=4 -Wmissing-declarations -Wno-parentheses -Wdiv-by-zero -Wcast-align -Wformat -Wformat-security -Wignored-qualifiers -Wsign-conversion -Wsign-compare -Werror=missing-declarations -Werror=implicit-function-declaration -Wno-nested-externs -Werror=int-to-pointer-cast -Werror=pointer-sign -Werror=pointer-to-int-cast -Werror=return-local-addr -Werror=missing-prototypes -Werror=missing-field-initializers --sysroot=C:/ProgramFiles/MinGW-powerpc-eabivle-4.9.4/powerpc-eabivle/newlib -MMD -std=gnu11 -Icode -DPRODUCTION -DNDEBUG -DTL42 -g1 -gdwarf-2 -O3 -o bin/ppc/PRODUCTION/obj/bcc_ulim5.o thisFolderStandsForAnyPathToCustomerCode/codeSampleCustomer/Integration/sohr5.c&lt;/P&gt;&lt;P&gt;Our problem analysis:&lt;/P&gt;&lt;P&gt;For source code line 265, the compiler emits the instruction&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;e_bc 1,28,$+12&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;The instruction tries to evaluate the compare register CR7, which is not permitted in this VLE instruction. The original Book E instruction bc uses the 5 Bit field BI to select a compare result bit and would allow the value of 28 (see EREF, 6.4, p. 413) but the VLE instruction e_bc has only 4 Bit for field BI32 (despite of its name) and restricts the range of accessible compare result bits to 0..15 (see VLE, p. 3-13 = 45). Accordingly, the assembler complains about the 28.&lt;BR /&gt;Many other assembly code locations from the same file make use of instruction e_mcrf to first move the otherwise inaccessible compare result bits to the accessible range and evaluate only then (see snippet below). The faulty code pattern has seen just once in the entire project.&lt;/P&gt;&lt;P&gt;EREF: "EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors", EREF_RM, Rev. 1 (EIS 2.1), 06/2014&lt;/P&gt;&lt;P&gt;VLE: "Variable-Length Encoding (VLE) Programming Environments Manual: A Supplement to the EREF", VLEPEM, Rev. 0, 07/2007&lt;/P&gt;&lt;P&gt;Here is a snippet from the generated assembly code (written by the compiler). Unfortunately, the full assembly listing and the original source file can't be disclosed because of intellectual property concerns:&lt;/P&gt;&lt;P&gt;(..)&lt;BR /&gt;.L247:&lt;BR /&gt;.loc 1 4672 0&lt;BR /&gt;e_mcrf %cr0,%cr7&lt;BR /&gt;e_beq %cr0,.L248&lt;BR /&gt;.loc 1 4673 0&lt;BR /&gt;e_lbz %r6,Sbccsohr5124_RSWE@sda21(%r0)&lt;BR /&gt;se_cmpi %r6,0&lt;BR /&gt;e_beq %cr0,.L249&lt;BR /&gt;e_lhz %r24,X_Sbccsohr5124_Unit_Delay6@sda21(%r0)&lt;BR /&gt;.L250:&lt;/P&gt;&lt;P&gt;(..)&lt;/P&gt;&lt;P&gt;.L262:&lt;BR /&gt;.loc 1 4798 0&lt;BR /&gt;e_beq %cr1,.L263&lt;BR /&gt;.loc 1 4799 0&lt;BR /&gt;e_lbz %r6,Sbccsohr5121_RSWE@sda21(%r0)&lt;BR /&gt;e_cmpi %cr1,%r6,0&lt;BR /&gt;e_beq %cr1,.L264&lt;BR /&gt;e_lhz %r0,X_Sbccsohr5121_Unit_Delay6@sda21(%r0)&lt;BR /&gt;.L265:&lt;BR /&gt;cmpl %cr7,%r7,%r0&lt;BR /&gt;e_bc 1,28,$+12 /* Book E instruction bc used as (invalid) VLE instruction e_bc */&lt;BR /&gt;mr %r6,%r7&lt;BR /&gt;e_b $+8&lt;BR /&gt;mr %r6,%r0&lt;BR /&gt;e_sth %r6,Sbccsohr5121_Modl2@sda21(%r0)&lt;BR /&gt;.loc 1 4823 0&lt;BR /&gt;e_sth %r6,X_Sbccsohr5121_Unit_Delay6@sda21(%r0)&lt;/P&gt;&lt;P&gt;(..)&lt;/P&gt;&lt;P&gt;Kind regards&lt;/P&gt;&lt;P&gt;Peter Vranken&lt;/P&gt;</description>
    <pubDate>Thu, 28 Jan 2021 19:33:17 GMT</pubDate>
    <dc:creator>peter_vranken</dc:creator>
    <dc:date>2021-01-28T19:33:17Z</dc:date>
    <item>
      <title>PowerPC VLE GCC: Compiler Bug, invalid Instruction emitted</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/PowerPC-VLE-GCC-Compiler-Bug-invalid-Instruction-emitted/m-p/1222845#M7206</link>
      <description>&lt;P&gt;Dear NXP Team,&lt;/P&gt;&lt;P&gt;Compiling a C source file using your GCC for PPC VLE we encountered a problem. The compiler successfully completed but the assembler rejected the generated assembly file in the second pass. Inspection of the assembly listing revealed an invalid instruction, which had been emitted by the compiler pass.&lt;/P&gt;&lt;P&gt;The C compiler is:&lt;/P&gt;&lt;P&gt;"powerpc-eabivle-gcc.exe (GCC) 4.9.4 20160726 (Sat May 27 11:09:55 CDT 2017 build.sh rev=gd8b6c20 s=F494 ELe200 -V release_gd8b6c20_build_Fed_ELe200_ML0)"&lt;/P&gt;&lt;P&gt;This is the command line. We have removed some -I&amp;lt;path&amp;gt; switches. The problem appeared with -O3 and likely with -Os but not with -O2:&lt;/P&gt;&lt;P&gt;powerpc-eabivle-gcc.exe -c -mcpu=e200z4 -mbig-endian -mvle -misel=yes -meabi -msdata=default -G8 -mregnames -fshort-double -fsingle-precision-constant -mhard-float -mno-string -fno-common -fno-exceptions -ffunction-sections -fdata-sections -fshort-enums -fdiagnostics-show-option -finline-functions -fmessage-length=0 -fzero-initialized-in-bss -fno-tree-loop-optimize -Wall -Wno-main -Wno-old-style-declaration -Wextra -Wstrict-overflow=4 -Wmissing-declarations -Wno-parentheses -Wdiv-by-zero -Wcast-align -Wformat -Wformat-security -Wignored-qualifiers -Wsign-conversion -Wsign-compare -Werror=missing-declarations -Werror=implicit-function-declaration -Wno-nested-externs -Werror=int-to-pointer-cast -Werror=pointer-sign -Werror=pointer-to-int-cast -Werror=return-local-addr -Werror=missing-prototypes -Werror=missing-field-initializers --sysroot=C:/ProgramFiles/MinGW-powerpc-eabivle-4.9.4/powerpc-eabivle/newlib -MMD -std=gnu11 -Icode -DPRODUCTION -DNDEBUG -DTL42 -g1 -gdwarf-2 -O3 -o bin/ppc/PRODUCTION/obj/bcc_ulim5.o thisFolderStandsForAnyPathToCustomerCode/codeSampleCustomer/Integration/sohr5.c&lt;/P&gt;&lt;P&gt;Our problem analysis:&lt;/P&gt;&lt;P&gt;For source code line 265, the compiler emits the instruction&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;e_bc 1,28,$+12&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;The instruction tries to evaluate the compare register CR7, which is not permitted in this VLE instruction. The original Book E instruction bc uses the 5 Bit field BI to select a compare result bit and would allow the value of 28 (see EREF, 6.4, p. 413) but the VLE instruction e_bc has only 4 Bit for field BI32 (despite of its name) and restricts the range of accessible compare result bits to 0..15 (see VLE, p. 3-13 = 45). Accordingly, the assembler complains about the 28.&lt;BR /&gt;Many other assembly code locations from the same file make use of instruction e_mcrf to first move the otherwise inaccessible compare result bits to the accessible range and evaluate only then (see snippet below). The faulty code pattern has seen just once in the entire project.&lt;/P&gt;&lt;P&gt;EREF: "EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors", EREF_RM, Rev. 1 (EIS 2.1), 06/2014&lt;/P&gt;&lt;P&gt;VLE: "Variable-Length Encoding (VLE) Programming Environments Manual: A Supplement to the EREF", VLEPEM, Rev. 0, 07/2007&lt;/P&gt;&lt;P&gt;Here is a snippet from the generated assembly code (written by the compiler). Unfortunately, the full assembly listing and the original source file can't be disclosed because of intellectual property concerns:&lt;/P&gt;&lt;P&gt;(..)&lt;BR /&gt;.L247:&lt;BR /&gt;.loc 1 4672 0&lt;BR /&gt;e_mcrf %cr0,%cr7&lt;BR /&gt;e_beq %cr0,.L248&lt;BR /&gt;.loc 1 4673 0&lt;BR /&gt;e_lbz %r6,Sbccsohr5124_RSWE@sda21(%r0)&lt;BR /&gt;se_cmpi %r6,0&lt;BR /&gt;e_beq %cr0,.L249&lt;BR /&gt;e_lhz %r24,X_Sbccsohr5124_Unit_Delay6@sda21(%r0)&lt;BR /&gt;.L250:&lt;/P&gt;&lt;P&gt;(..)&lt;/P&gt;&lt;P&gt;.L262:&lt;BR /&gt;.loc 1 4798 0&lt;BR /&gt;e_beq %cr1,.L263&lt;BR /&gt;.loc 1 4799 0&lt;BR /&gt;e_lbz %r6,Sbccsohr5121_RSWE@sda21(%r0)&lt;BR /&gt;e_cmpi %cr1,%r6,0&lt;BR /&gt;e_beq %cr1,.L264&lt;BR /&gt;e_lhz %r0,X_Sbccsohr5121_Unit_Delay6@sda21(%r0)&lt;BR /&gt;.L265:&lt;BR /&gt;cmpl %cr7,%r7,%r0&lt;BR /&gt;e_bc 1,28,$+12 /* Book E instruction bc used as (invalid) VLE instruction e_bc */&lt;BR /&gt;mr %r6,%r7&lt;BR /&gt;e_b $+8&lt;BR /&gt;mr %r6,%r0&lt;BR /&gt;e_sth %r6,Sbccsohr5121_Modl2@sda21(%r0)&lt;BR /&gt;.loc 1 4823 0&lt;BR /&gt;e_sth %r6,X_Sbccsohr5121_Unit_Delay6@sda21(%r0)&lt;/P&gt;&lt;P&gt;(..)&lt;/P&gt;&lt;P&gt;Kind regards&lt;/P&gt;&lt;P&gt;Peter Vranken&lt;/P&gt;</description>
      <pubDate>Thu, 28 Jan 2021 19:33:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/PowerPC-VLE-GCC-Compiler-Bug-invalid-Instruction-emitted/m-p/1222845#M7206</guid>
      <dc:creator>peter_vranken</dc:creator>
      <dc:date>2021-01-28T19:33:17Z</dc:date>
    </item>
    <item>
      <title>Re: PowerPC VLE GCC: Compiler Bug, invalid Instruction emitted</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/PowerPC-VLE-GCC-Compiler-Bug-invalid-Instruction-emitted/m-p/1223174#M7208</link>
      <description>&lt;P&gt;Hello Peter,&lt;/P&gt;
&lt;P&gt;Thank you indeeed for the detailed analysis of the compiler issue you are facing.&lt;/P&gt;
&lt;P&gt;In fact this is a known issue (CMPE200GCC-183) that has been fixed in the latest version of GCC compiler (Version 280218) - release notes:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/release-note/S32DS-POWER-v1-2-RN.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/release-note/S32DS-POWER-v1-2-RN.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If possible I'd recommend you to download and install the latest S32DS for Power v2.1 (&lt;A href="https://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/S32-Design-Studio-for-Power-Architecture-v2-1-Windows-Linux/ta-p/1123875" target="_blank"&gt;https://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/S32-Design-Studio-for-Power-Architecture-v2-1-Windows-Linux/ta-p/1123875&lt;/A&gt;)&amp;nbsp;and use this version of build tools instead.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope it helps.&lt;/P&gt;
&lt;P&gt;Stan&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 29 Jan 2021 09:31:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/PowerPC-VLE-GCC-Compiler-Bug-invalid-Instruction-emitted/m-p/1223174#M7208</guid>
      <dc:creator>stanish</dc:creator>
      <dc:date>2021-01-29T09:31:10Z</dc:date>
    </item>
    <item>
      <title>Re: PowerPC VLE GCC: Compiler Bug, invalid Instruction emitted</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/PowerPC-VLE-GCC-Compiler-Bug-invalid-Instruction-emitted/m-p/1223304#M7209</link>
      <description>&lt;P&gt;Thanks a lot, Stan. I'm a bit confused. I regularly updated the S32 Design&lt;BR /&gt;Studio (last recently in December 2020 to Update 14) and each time I did,&lt;BR /&gt;I looked for version updates of GCC. If I run gcc with command line&lt;BR /&gt;--version, then I get from S32DS PA 2.1, Update 14:&lt;/P&gt;&lt;P&gt;S32 Design Studio, V 2.1, latest update (no. 14):&lt;/P&gt;&lt;P&gt;powerpc-eabivle-gcc-4.9.4.exe (BLD = 1607) 4.9.4 20160726 (build.sh rev=gceb1328 s=F494 -i /opt/freescale ELe200 -V release_gceb1328_build_Fed_ELe200_ML3)&lt;BR /&gt;Copyright (C) 2015 Free Software Foundation, Inc.&lt;BR /&gt;This is free software; see the source for copying conditions. There is NO&lt;BR /&gt;warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.&lt;/P&gt;&lt;P&gt;In our project, we indeed run an elder version, which responds:&lt;/P&gt;&lt;P&gt;powerpc-eabivle-gcc-4.9.4.exe (GCC) 4.9.4 20160726 (Sat May 27 11:09:55 CDT 2017 build.sh rev=gd8b6c20 s=F494 ELe200 -V release_gd8b6c20_build_Fed_ELe200_ML0)&lt;BR /&gt;Copyright (C) 2015 Free Software Foundation, Inc.&lt;BR /&gt;This is free software; see the source for copying conditions. There is NO&lt;BR /&gt;warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.&lt;/P&gt;&lt;P&gt;Both give "4.9.4 20160726" as version designation and this is the reason,&lt;BR /&gt;why I didn't upgrade the project's compiler.&lt;/P&gt;&lt;P&gt;In your post, you mention "Version 280218" as current version designation.&lt;BR /&gt;This seems to be related to year 2018, our looks rather like 2016, both&lt;BR /&gt;wouldn't be very recent. How does all of this fit together? Won't we get&lt;BR /&gt;the new GCC with the Update 14 of the Design Studio? Do we need to&lt;BR /&gt;download it somehow differently? Is there an explicit download site for&lt;BR /&gt;the compiler tool chain?&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;</description>
      <pubDate>Fri, 29 Jan 2021 13:42:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/PowerPC-VLE-GCC-Compiler-Bug-invalid-Instruction-emitted/m-p/1223304#M7209</guid>
      <dc:creator>peter_vranken</dc:creator>
      <dc:date>2021-01-29T13:42:32Z</dc:date>
    </item>
    <item>
      <title>Re: PowerPC VLE GCC: Compiler Bug, invalid Instruction emitted</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/PowerPC-VLE-GCC-Compiler-Bug-invalid-Instruction-emitted/m-p/1224085#M7214</link>
      <description>&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;Hi Peter,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;I agree that GCC versioning for S32DS Power is bit of confusing.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;The GCC version reflects the official version of the tools that we use as a base for the build tools.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;Our releases cannot increment this version since it they are not the official GCC releases. Rather they should be considered as customizations. To differentiate between the releases you should check the build timestamp or build number (added later).&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;See below the snippet from the release notes document:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt; The version information (emitted via –version or -v) output format has changed to precisely&lt;BR /&gt;define a build BLD identifier as an integer value whose value will always increase with each&lt;BR /&gt;subsequent release. Example:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;&lt;BR /&gt;&lt;SPAN class="fontstyle2"&gt;$ powerpc-eabivle-gcc --version&lt;BR /&gt;powerpc-eabivle-gcc (BLD = 1607) 4.9.4 20160726 (build.sh rev=gceb1328 s=F494 \&lt;BR /&gt;-i /opt/freescale ELe200 -V release_gceb1328_build_Fed_ELe200_ML3)&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;&lt;SPAN class="fontstyle2"&gt;$ powerpc-eabivle-gcc -v&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN class="fontstyle0"&gt;&lt;SPAN class="fontstyle2"&gt;&amp;lt;snip&amp;gt;&lt;BR /&gt;gcc version 4.9.4 20160726 (build.sh rev=gceb1328 s=F494 -i /opt/freescale \&lt;BR /&gt;ELe200 -V release_gceb1328_build_Fed_ELe200_ML3) (BLD = 1607)&lt;/SPAN&gt; &lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;Perhaps&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/109569"&gt;@alexanderfedoto&lt;/a&gt; could you possibly comment on this one?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Stan&lt;/P&gt;</description>
      <pubDate>Mon, 01 Feb 2021 12:46:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/PowerPC-VLE-GCC-Compiler-Bug-invalid-Instruction-emitted/m-p/1224085#M7214</guid>
      <dc:creator>stanish</dc:creator>
      <dc:date>2021-02-01T12:46:20Z</dc:date>
    </item>
  </channel>
</rss>

