topic Re: S32DS Power Architecture - Optimization Level (-O1) in S32 Design Studio

S32DS Power Architecture - Optimization Level (-O1)

demian91 — Wed, 19 Feb 2020 20:55:31 GMT

Hi i trying to use Standard 32DS C Compiler with Optimization Level -O1 in the IDE S32DS.Power.2.1 and i have problems between Optimization -O0 and -O1.

In my case i using in MPC5746R the DSPI with DMA and EOQ interrupts and when i read for example a register of 16 bits, it takes 4 milliseconds and in -O0 works correct for the time.

Any Document about the diferents optimization levels that explain what does the IDE do?

Re: S32DS Power Architecture - Optimization Level (-O1)

jiri_kral — Thu, 20 Feb 2020 12:32:40 GMT

Hi,

you can look at gcc documentation - GCC online documentation- GNU Project - Free Software Foundation (FSF)

Did you tried find out what's wrong whit single instruction debug?

It is possible share your project?

Jiri

Re: S32DS Power Architecture - Optimization Level (-O1)

demian91 — Thu, 20 Feb 2020 13:06:30 GMT

Thanks for the documents, i saw the instructions but i couldn´t understand all.

Re: S32DS Power Architecture - Optimization Level (-O1)

jiri_kral — Thu, 20 Feb 2020 13:13:24 GMT

Hi,

well, it's really hard to say what may be wrong without project. Almost in all cases are optimization faults caused by wrong programming technique and optimization just uncovers it.

Try to compare the part of disassembled code which causes issue for both optimization levels (O0 and O1).

Jiri