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    <title>topic Re: Configuration of a Slave SPI in S32 Design Studio</title>
    <link>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724251#M2133</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi and thank you for your reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here my project.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DriverSPI_t spi0 = {&lt;BR /&gt; .driver_SPI = LPSPI0,&lt;BR /&gt; .speed = 9600,&lt;BR /&gt; .Frame_Size = 15u,&lt;BR /&gt; .mode_SPI = SPI_Mode_Master ,&lt;BR /&gt; .cpol = SPI_Clock_Polarity_Enable_low,&lt;BR /&gt; .cpha = SPI_Clock_Phase_Leading_Edge,&lt;BR /&gt; .IsLSBFirst = SPI_Data_MSB_First,&lt;BR /&gt; .spi_pcs = SPI_PCS_1,&lt;BR /&gt; .pin_pcs = 31, //PTA31&lt;BR /&gt; .pin_sck = 2,&lt;BR /&gt; .pin_sin = 3,&lt;BR /&gt; .pin_sout = 1,&lt;BR /&gt; .port = PORTB&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DriverSPI_t spi2 = {&lt;BR /&gt; .driver_SPI = LPSPI2,&lt;BR /&gt; .speed = 9600,&lt;BR /&gt; .Frame_Size = 31u,&lt;BR /&gt; .mode_SPI = SPI_Mode_Slave,&lt;BR /&gt; .cpol = SPI_Clock_Polarity_Enable_low,&lt;BR /&gt; .cpha = SPI_Clock_Phase_Following_Edge,&lt;BR /&gt; .IsLSBFirst = SPI_Data_MSB_First,&lt;BR /&gt; .spi_pcs = SPI_PCS_2,&lt;BR /&gt; .pin_pcs = 13,&lt;BR /&gt; .pin_sck = 15,&lt;BR /&gt; .pin_sin = 16,&lt;BR /&gt; .pin_sout = 8, //A8&lt;BR /&gt; .port = PORTE&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;};&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void spi_init(DriverSPI_t spi){&lt;BR /&gt; if(spi.driver_SPI == LPSPI0)&lt;BR /&gt; {&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI0_INDEX] = 0;&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI0_INDEX] = Clock_Launch_SPI; //Activation of the SPI clock&lt;BR /&gt; }&lt;BR /&gt; else if(spi.driver_SPI == LPSPI1){&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI1_INDEX] = 0;&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI1_INDEX] = Clock_Launch_SPI; //Activation of the SPI clock&lt;BR /&gt; }&lt;BR /&gt; else if(spi.driver_SPI == LPSPI2){&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI2_INDEX] = 0;&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI2_INDEX] = 0xC6000000; //Activation of the SPI clock&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;spi.driver_SPI-&amp;gt;CR = LPSPI_CR_RST_MASK;&lt;BR /&gt; spi.driver_SPI-&amp;gt;CR = 0x00000000 ; //Disable module&lt;/P&gt;&lt;P&gt;if(spi.mode_SPI == SPI_Mode_Master){ //Init Master mode&lt;BR /&gt; spi.driver_SPI-&amp;gt;IER = LPSPI_IER_TDIE(1) | LPSPI_IER_RDIE(1) ; //Receive and transmit data interrupt enabled&lt;BR /&gt; spi.driver_SPI-&amp;gt;DER = 0 ;&lt;BR /&gt; spi.driver_SPI-&amp;gt;CFGR0 = 0 ;&lt;BR /&gt; spi.driver_SPI-&amp;gt;CFGR1 = LPSPI_CFGR1_MASTER(spi.mode_SPI) |&lt;BR /&gt; LPSPI_CFGR1_SAMPLE(0) |&lt;BR /&gt; LPSPI_CFGR1_AUTOPCS(0) |&lt;BR /&gt; LPSPI_CFGR1_NOSTALL(0) |&lt;BR /&gt; LPSPI_CFGR1_PCSPOL(2) | //All peripheral chip select pin is active high&lt;BR /&gt; LPSPI_CFGR1_MATCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_PINCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_OUTCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_PCSCFG(0);&lt;BR /&gt; spi.driver_SPI-&amp;gt;TCR = LPSPI_TCR_FRAMESZ(spi.Frame_Size) |&lt;BR /&gt; LPSPI_TCR_WIDTH(0) |&lt;BR /&gt; LPSPI_TCR_TXMSK(0) |&lt;BR /&gt; LPSPI_TCR_LSBF(MSB_First) |&lt;BR /&gt; LPSPI_TCR_PCS(spi.spi_pcs) |&lt;BR /&gt; LPSPI_TCR_PRESCALE(3) | //functional clock/Prescaler = 7MHz&lt;BR /&gt; LPSPI_TCR_CPHA(spi.cpha) |&lt;BR /&gt; LPSPI_TCR_CPOL(spi.cpol);&lt;BR /&gt; spi.driver_SPI-&amp;gt;CCR = LPSPI_CCR_SCKDIV(5u) | //SCK = 1Mhz, T=1µs&lt;BR /&gt; LPSPI_CCR_DBT(8u) | //1.43µs between frame&lt;BR /&gt; LPSPI_CCR_PCSSCK(4u) | //714.3 from the PCS assertion to the first SCK edge&lt;BR /&gt; LPSPI_CCR_SCKPCS(4u); //714.3 from the last edge to the PCS negation&lt;BR /&gt; spi.driver_SPI-&amp;gt;FCR = LPSPI_FCR_TXWATER(3u) | //Transmit Data flag set when # words &amp;lt;= 3&lt;BR /&gt; LPSPI_FCR_RXWATER(0u); //Receive Data flag set when # words &amp;gt; 0&lt;BR /&gt; }&lt;BR /&gt; else if(spi.mode_SPI == SPI_Mode_Slave){ //Init Slave mode&lt;BR /&gt; spi.driver_SPI-&amp;gt;IER = 0x00000000 ; //Receive and transmit data interrupt enabled&lt;BR /&gt; spi.driver_SPI-&amp;gt;DER = 0 ;&lt;BR /&gt; spi.driver_SPI-&amp;gt;CFGR0 = 0 ;&lt;BR /&gt; spi.driver_SPI-&amp;gt;CFGR1 = LPSPI_CFGR1_MASTER(spi.mode_SPI) | //Slave mode&lt;BR /&gt; LPSPI_CFGR1_SAMPLE(0) |&lt;BR /&gt; LPSPI_CFGR1_AUTOPCS(1) |&lt;BR /&gt; LPSPI_CFGR1_NOSTALL(0) |&lt;BR /&gt; LPSPI_CFGR1_PCSPOL(1) | //Chip select 0 is active high&lt;BR /&gt; LPSPI_CFGR1_MATCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_PINCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_OUTCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_PCSCFG(0);&lt;BR /&gt; spi.driver_SPI-&amp;gt;TCR = LPSPI_TCR_FRAMESZ(spi.Frame_Size) | //Size of the the frame&lt;BR /&gt; LPSPI_TCR_WIDTH(0) |&lt;BR /&gt; LPSPI_TCR_RXMSK(0) |&lt;BR /&gt; LPSPI_TCR_LSBF(spi.IsLSBFirst) |&lt;BR /&gt; LPSPI_TCR_PCS(spi.spi_pcs) |&lt;BR /&gt; LPSPI_TCR_PRESCALE(2u) |&lt;BR /&gt; LPSPI_TCR_CPHA(spi.cpha) |&lt;BR /&gt; LPSPI_TCR_CPOL(spi.cpol);&lt;BR /&gt; spi.driver_SPI-&amp;gt;FCR = LPSPI_FCR_TXWATER(3u) | //Transmit Data flag set when # words &amp;lt;= 3&lt;BR /&gt; LPSPI_FCR_RXWATER(0u); //Receive Data flag set when # words &amp;gt; 0&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;spi.driver_SPI-&amp;gt;CR = SPI_Launch; //Enable module&lt;BR /&gt; if(spi.driver_SPI == LPSPI0){&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_sck] |= PORT_PCR_MUX(3u);&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_sin] |= PORT_PCR_MUX(3u);&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_sout] |= PORT_PCR_MUX(3u);&lt;BR /&gt; if(spi.mode_SPI == SPI_Mode_Master){&lt;BR /&gt; PORTA-&amp;gt;PCR[spi.pin_pcs] |= PORT_PCR_MUX(4u);&lt;BR /&gt; }&lt;BR /&gt; }&lt;BR /&gt; else if(spi.driver_SPI == LPSPI2){&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_sck] |= PORT_PCR_MUX(3u);&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_sin] |= PORT_PCR_MUX(3u);&lt;BR /&gt; PORTA-&amp;gt;PCR[spi.pin_sout] |= PORT_PCR_MUX(3u);&lt;BR /&gt; if(spi.mode_SPI == SPI_Mode_Master){&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_pcs] |= PORT_PCR_MUX(2u);&lt;BR /&gt; }&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;--------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And here the polling mode to receive the frame.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;while(!(LPSPI0-&amp;gt;SR &amp;amp; LPSPI_SR_TDF_MASK) );&lt;BR /&gt; LPSPI0-&amp;gt;TDR = 0x1402;&lt;BR /&gt; LPSPI0-&amp;gt;SR |= LPSPI_SR_TDF_MASK;&lt;/P&gt;&lt;P&gt;while((LPSPI2-&amp;gt;SR &amp;amp; LPSPI_SR_RDF_MASK)&amp;gt;&amp;gt;LPSPI_SR_RDF_SHIFT==0);&lt;BR /&gt; receive_Frame_SPI = LPSPI2-&amp;gt;RDR;&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks by advance.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Fred&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 07 May 2018 07:48:41 GMT</pubDate>
    <dc:creator>madogz28</dc:creator>
    <dc:date>2018-05-07T07:48:41Z</dc:date>
    <item>
      <title>Configuration of a Slave SPI</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724249#M2131</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I try to make my own SPI initialization without using SDK (for an internship).&amp;nbsp;&lt;/P&gt;&lt;P&gt;I wrote a API in order to initialize a Slave but I can't receive frames.&amp;nbsp;&lt;BR /&gt;Anyone know out to initialize a Slave with registers please ?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Fred&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 May 2018 14:38:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724249#M2131</guid>
      <dc:creator>madogz28</dc:creator>
      <dc:date>2018-05-03T14:38:45Z</dc:date>
    </item>
    <item>
      <title>Re: Configuration of a Slave SPI</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724250#M2132</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you please provide the project you created? It is difficult to know what could be the issue from the details you have provided. There are many things which could cause the slave to not receive the frames, it is hard to guess which could be the cause.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mike&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 May 2018 15:22:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724250#M2132</guid>
      <dc:creator>mikedoidge</dc:creator>
      <dc:date>2018-05-04T15:22:19Z</dc:date>
    </item>
    <item>
      <title>Re: Configuration of a Slave SPI</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724251#M2133</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi and thank you for your reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here my project.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DriverSPI_t spi0 = {&lt;BR /&gt; .driver_SPI = LPSPI0,&lt;BR /&gt; .speed = 9600,&lt;BR /&gt; .Frame_Size = 15u,&lt;BR /&gt; .mode_SPI = SPI_Mode_Master ,&lt;BR /&gt; .cpol = SPI_Clock_Polarity_Enable_low,&lt;BR /&gt; .cpha = SPI_Clock_Phase_Leading_Edge,&lt;BR /&gt; .IsLSBFirst = SPI_Data_MSB_First,&lt;BR /&gt; .spi_pcs = SPI_PCS_1,&lt;BR /&gt; .pin_pcs = 31, //PTA31&lt;BR /&gt; .pin_sck = 2,&lt;BR /&gt; .pin_sin = 3,&lt;BR /&gt; .pin_sout = 1,&lt;BR /&gt; .port = PORTB&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DriverSPI_t spi2 = {&lt;BR /&gt; .driver_SPI = LPSPI2,&lt;BR /&gt; .speed = 9600,&lt;BR /&gt; .Frame_Size = 31u,&lt;BR /&gt; .mode_SPI = SPI_Mode_Slave,&lt;BR /&gt; .cpol = SPI_Clock_Polarity_Enable_low,&lt;BR /&gt; .cpha = SPI_Clock_Phase_Following_Edge,&lt;BR /&gt; .IsLSBFirst = SPI_Data_MSB_First,&lt;BR /&gt; .spi_pcs = SPI_PCS_2,&lt;BR /&gt; .pin_pcs = 13,&lt;BR /&gt; .pin_sck = 15,&lt;BR /&gt; .pin_sin = 16,&lt;BR /&gt; .pin_sout = 8, //A8&lt;BR /&gt; .port = PORTE&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;};&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void spi_init(DriverSPI_t spi){&lt;BR /&gt; if(spi.driver_SPI == LPSPI0)&lt;BR /&gt; {&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI0_INDEX] = 0;&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI0_INDEX] = Clock_Launch_SPI; //Activation of the SPI clock&lt;BR /&gt; }&lt;BR /&gt; else if(spi.driver_SPI == LPSPI1){&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI1_INDEX] = 0;&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI1_INDEX] = Clock_Launch_SPI; //Activation of the SPI clock&lt;BR /&gt; }&lt;BR /&gt; else if(spi.driver_SPI == LPSPI2){&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI2_INDEX] = 0;&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI2_INDEX] = 0xC6000000; //Activation of the SPI clock&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;spi.driver_SPI-&amp;gt;CR = LPSPI_CR_RST_MASK;&lt;BR /&gt; spi.driver_SPI-&amp;gt;CR = 0x00000000 ; //Disable module&lt;/P&gt;&lt;P&gt;if(spi.mode_SPI == SPI_Mode_Master){ //Init Master mode&lt;BR /&gt; spi.driver_SPI-&amp;gt;IER = LPSPI_IER_TDIE(1) | LPSPI_IER_RDIE(1) ; //Receive and transmit data interrupt enabled&lt;BR /&gt; spi.driver_SPI-&amp;gt;DER = 0 ;&lt;BR /&gt; spi.driver_SPI-&amp;gt;CFGR0 = 0 ;&lt;BR /&gt; spi.driver_SPI-&amp;gt;CFGR1 = LPSPI_CFGR1_MASTER(spi.mode_SPI) |&lt;BR /&gt; LPSPI_CFGR1_SAMPLE(0) |&lt;BR /&gt; LPSPI_CFGR1_AUTOPCS(0) |&lt;BR /&gt; LPSPI_CFGR1_NOSTALL(0) |&lt;BR /&gt; LPSPI_CFGR1_PCSPOL(2) | //All peripheral chip select pin is active high&lt;BR /&gt; LPSPI_CFGR1_MATCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_PINCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_OUTCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_PCSCFG(0);&lt;BR /&gt; spi.driver_SPI-&amp;gt;TCR = LPSPI_TCR_FRAMESZ(spi.Frame_Size) |&lt;BR /&gt; LPSPI_TCR_WIDTH(0) |&lt;BR /&gt; LPSPI_TCR_TXMSK(0) |&lt;BR /&gt; LPSPI_TCR_LSBF(MSB_First) |&lt;BR /&gt; LPSPI_TCR_PCS(spi.spi_pcs) |&lt;BR /&gt; LPSPI_TCR_PRESCALE(3) | //functional clock/Prescaler = 7MHz&lt;BR /&gt; LPSPI_TCR_CPHA(spi.cpha) |&lt;BR /&gt; LPSPI_TCR_CPOL(spi.cpol);&lt;BR /&gt; spi.driver_SPI-&amp;gt;CCR = LPSPI_CCR_SCKDIV(5u) | //SCK = 1Mhz, T=1µs&lt;BR /&gt; LPSPI_CCR_DBT(8u) | //1.43µs between frame&lt;BR /&gt; LPSPI_CCR_PCSSCK(4u) | //714.3 from the PCS assertion to the first SCK edge&lt;BR /&gt; LPSPI_CCR_SCKPCS(4u); //714.3 from the last edge to the PCS negation&lt;BR /&gt; spi.driver_SPI-&amp;gt;FCR = LPSPI_FCR_TXWATER(3u) | //Transmit Data flag set when # words &amp;lt;= 3&lt;BR /&gt; LPSPI_FCR_RXWATER(0u); //Receive Data flag set when # words &amp;gt; 0&lt;BR /&gt; }&lt;BR /&gt; else if(spi.mode_SPI == SPI_Mode_Slave){ //Init Slave mode&lt;BR /&gt; spi.driver_SPI-&amp;gt;IER = 0x00000000 ; //Receive and transmit data interrupt enabled&lt;BR /&gt; spi.driver_SPI-&amp;gt;DER = 0 ;&lt;BR /&gt; spi.driver_SPI-&amp;gt;CFGR0 = 0 ;&lt;BR /&gt; spi.driver_SPI-&amp;gt;CFGR1 = LPSPI_CFGR1_MASTER(spi.mode_SPI) | //Slave mode&lt;BR /&gt; LPSPI_CFGR1_SAMPLE(0) |&lt;BR /&gt; LPSPI_CFGR1_AUTOPCS(1) |&lt;BR /&gt; LPSPI_CFGR1_NOSTALL(0) |&lt;BR /&gt; LPSPI_CFGR1_PCSPOL(1) | //Chip select 0 is active high&lt;BR /&gt; LPSPI_CFGR1_MATCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_PINCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_OUTCFG(0) |&lt;BR /&gt; LPSPI_CFGR1_PCSCFG(0);&lt;BR /&gt; spi.driver_SPI-&amp;gt;TCR = LPSPI_TCR_FRAMESZ(spi.Frame_Size) | //Size of the the frame&lt;BR /&gt; LPSPI_TCR_WIDTH(0) |&lt;BR /&gt; LPSPI_TCR_RXMSK(0) |&lt;BR /&gt; LPSPI_TCR_LSBF(spi.IsLSBFirst) |&lt;BR /&gt; LPSPI_TCR_PCS(spi.spi_pcs) |&lt;BR /&gt; LPSPI_TCR_PRESCALE(2u) |&lt;BR /&gt; LPSPI_TCR_CPHA(spi.cpha) |&lt;BR /&gt; LPSPI_TCR_CPOL(spi.cpol);&lt;BR /&gt; spi.driver_SPI-&amp;gt;FCR = LPSPI_FCR_TXWATER(3u) | //Transmit Data flag set when # words &amp;lt;= 3&lt;BR /&gt; LPSPI_FCR_RXWATER(0u); //Receive Data flag set when # words &amp;gt; 0&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;spi.driver_SPI-&amp;gt;CR = SPI_Launch; //Enable module&lt;BR /&gt; if(spi.driver_SPI == LPSPI0){&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_sck] |= PORT_PCR_MUX(3u);&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_sin] |= PORT_PCR_MUX(3u);&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_sout] |= PORT_PCR_MUX(3u);&lt;BR /&gt; if(spi.mode_SPI == SPI_Mode_Master){&lt;BR /&gt; PORTA-&amp;gt;PCR[spi.pin_pcs] |= PORT_PCR_MUX(4u);&lt;BR /&gt; }&lt;BR /&gt; }&lt;BR /&gt; else if(spi.driver_SPI == LPSPI2){&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_sck] |= PORT_PCR_MUX(3u);&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_sin] |= PORT_PCR_MUX(3u);&lt;BR /&gt; PORTA-&amp;gt;PCR[spi.pin_sout] |= PORT_PCR_MUX(3u);&lt;BR /&gt; if(spi.mode_SPI == SPI_Mode_Master){&lt;BR /&gt; spi.port-&amp;gt;PCR[spi.pin_pcs] |= PORT_PCR_MUX(2u);&lt;BR /&gt; }&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;--------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And here the polling mode to receive the frame.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;while(!(LPSPI0-&amp;gt;SR &amp;amp; LPSPI_SR_TDF_MASK) );&lt;BR /&gt; LPSPI0-&amp;gt;TDR = 0x1402;&lt;BR /&gt; LPSPI0-&amp;gt;SR |= LPSPI_SR_TDF_MASK;&lt;/P&gt;&lt;P&gt;while((LPSPI2-&amp;gt;SR &amp;amp; LPSPI_SR_RDF_MASK)&amp;gt;&amp;gt;LPSPI_SR_RDF_SHIFT==0);&lt;BR /&gt; receive_Frame_SPI = LPSPI2-&amp;gt;RDR;&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks by advance.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Fred&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 May 2018 07:48:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724251#M2133</guid>
      <dc:creator>madogz28</dc:creator>
      <dc:date>2018-05-07T07:48:41Z</dc:date>
    </item>
    <item>
      <title>Re: Configuration of a Slave SPI</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724252#M2134</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Sorry, for the IER register, it's equal to 0.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 May 2018 08:06:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724252#M2134</guid>
      <dc:creator>madogz28</dc:creator>
      <dc:date>2018-05-07T08:06:54Z</dc:date>
    </item>
    <item>
      <title>Re: Configuration of a Slave SPI</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724253#M2135</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Since some of your settings are hidden behind macros, it is hard know for sure. I think you have a couple of settings wrong.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;spi.driver_SPI-&amp;gt;CR = 0x00000000 ; //Disable module -&amp;gt; This should be enabled, set it to 0x00000001&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;and&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;spi.driver_SPI-&amp;gt;CCR = LPSPI_CCR_SCKDIV(5u) | //SCK = 1Mhz, T=1µs -&amp;gt; This should be set to 8, not 5.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;You also might find this useful:&amp;nbsp;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/application-note/AN5413.pdf" title="https://www.nxp.com/docs/en/application-note/AN5413.pdf"&gt;https://www.nxp.com/docs/en/application-note/AN5413.pdf&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Mike&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 08 May 2018 20:20:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724253#M2135</guid>
      <dc:creator>mikedoidge</dc:creator>
      <dc:date>2018-05-08T20:20:15Z</dc:date>
    </item>
    <item>
      <title>Re: Configuration of a Slave SPI</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724254#M2136</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Yes I am sorry for that, i will put my program whitout the macro.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#define SPI_Launch 0x00000009&lt;BR /&gt;#define Clock_Launch_SPI 0xC6000000&lt;/P&gt;&lt;P&gt;#define MSB_First 0u&lt;BR /&gt;#define LSB_First 1u&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;typedef enum{&lt;BR /&gt; SPI_Clock_Polarity_Enable_low = 0u,&lt;BR /&gt; SPI_Clock_Polarity_Enable_high = 1u&lt;BR /&gt;} SPI_Clock_Polarity_t;&lt;/P&gt;&lt;P&gt;typedef enum{&lt;BR /&gt; SPI_Mode_Slave = 0u,&lt;BR /&gt; SPI_Mode_Master = 1u&lt;BR /&gt;} SPI_Mode_t;&lt;/P&gt;&lt;P&gt;typedef enum{&lt;BR /&gt; SPI_Clock_Phase_Leading_Edge = 0u,&lt;BR /&gt; SPI_Clock_Phase_Following_Edge = 1u&lt;BR /&gt;} SPI_Clock_Phase_t;&lt;/P&gt;&lt;P&gt;typedef enum{&lt;BR /&gt; SPI_Data_MSB_First = 0u,&lt;BR /&gt; SPI_Data_LSB_First = 1u&lt;BR /&gt;} SPI_LSB_First_t;&lt;/P&gt;&lt;P&gt;typedef enum{&lt;BR /&gt; SPI_PCS_0 = 0u,&lt;BR /&gt; SPI_PCS_1 = 1u,&lt;BR /&gt; SPI_PCS_2 = 2u,&lt;BR /&gt; SPI_PCS_3 = 3u&lt;BR /&gt;} SPI_PCS_t;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For the Control Register CR, I already saw on the Application note AN5413 that I have to disable the module in order to set the registers, and enable the module after that.&amp;nbsp;&lt;/P&gt;&lt;P&gt;For the Clock Configuration Register CCR, I forgot to tell you that I used the S32K148 in HSRUN mode (The BUS_CLK is to 56MHz), so this is fine.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Again I am sorry, I don't use often forum when I have problems.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Fred.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 14 May 2018 08:11:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724254#M2136</guid>
      <dc:creator>madogz28</dc:creator>
      <dc:date>2018-05-14T08:11:32Z</dc:date>
    </item>
    <item>
      <title>Re: Configuration of a Slave SPI</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724255#M2137</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Fred,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This request is really about LPSPI on the S32K1xx family and nothing specific to S32DS. I strongly urge you to pursue this on the dedicated community for the S32K family of MCUs.&amp;nbsp;&lt;A _jive_internal="true" href="https://community.nxp.com/community/s32/s32k" rel="noopener noreferrer" style="background-color: #ffffff; font-size: 14.6667px;" target="_blank"&gt;https://community.nxp.com/community/s32/s32k&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is much information about SPI and how to program it. You can search the discussion threads and see what others have already done.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would also suggest that you try using the SDK demo provided in S32DS as a way to verify that your hardware setup is good. This way you will know the issue remains just in your code.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Mike&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 May 2018 15:25:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/Configuration-of-a-Slave-SPI/m-p/724255#M2137</guid>
      <dc:creator>mikedoidge</dc:creator>
      <dc:date>2018-05-16T15:25:48Z</dc:date>
    </item>
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