S32 Design Studio中的主题 Re: S32DS 3.5 Debug issue with O3 optimization

S32DS 3.5 Debug issue with O3 optimization

Li_Chen — Wed, 21 Feb 2024 17:47:54 GMT

I update my S32DS ID to 3.5 and running the Port_Example_S32K344 example on S32K3X4EVB-Q172 board using PEmicro Debugger. It works as expected, but If I changed optimization level from -Os to -O3, I encountered the 'Break at address "0x0" with no debug information available, or outside of program code' error and cannot debug any more. I'm using SW32K3_RTD_4.4_R21-11_3.0.0_D2303_DS_updatesite

Re: S32DS 3.5 Debug issue with O3 optimization

VaneB — Thu, 22 Feb 2024 17:32:13 GMT

Hi @Li_Chen

Check the following post. It has information related to the topic that might be useful to you.

Is the MCU function and performance exactly the same for (-O3) and (-Os)?

B.R.

VaneB

Re: S32DS 3.5 Debug issue with O3 optimization

Li_Chen — Tue, 27 Feb 2024 19:48:48 GMT

I find the root cause is inside startup code. If change Optimization level to Os in the Startup_Code folder, the code could run as expected.

If Change to O3, the problem will happen after vldr d7, [r1] instruction inside startup.c/init_data_bss function. This is corresponding to the c code ram[j] = rom[j]; where is to copy rom data from __INIT_INTERRUPT_START address 0x00400800 to __RAM_INTERRUPT_START DTCM address 0x20000000. If using Os settup, the assembly is using different instruction ldr.w r7, [r1, r4, lsl #2] and str.w r7, [r0, r4, lsl #2].

Wondering If you have any better explanation or workaround about failure case if using O3 optimization.

Re: S32DS 3.5 Debug issue with O3 optimization

Li_Chen — Wed, 28 Feb 2024 18:19:33 GMT

Add volatile to those variables fix the issue:
volatile const uint32 * rom;
volatile const uint8 * rom8;
volatile uint32 * ram;
volatile uint8 * ram8;