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    <title>topic Re: could not use qDMA feature on LS1043A board in QorIQ</title>
    <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034059#M9085</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;A _jive_internal="true" data-content-finding="Community" data-userid="347906" data-username="ken.liu@aviagesystems.com" href="https://community.nxp.com/people/ken.liu@aviagesystems.com"&gt;Ken Liu&lt;/A&gt;,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please refer to the following procedure for qDMA engine initialization:&lt;/P&gt;&lt;P&gt;Try to halt the qDMA engine first.&lt;/P&gt;&lt;P&gt;Clear the command queue interrupt detect register for all queues.&lt;/P&gt;&lt;P&gt;Initialize Command Queue registers to point to the first command descriptor in memory.&lt;/P&gt;&lt;P&gt;Initialize the queue mode.&lt;/P&gt;&lt;P&gt;Initialize status queue registers to point to the first command descriptor in memory.&lt;/P&gt;&lt;P&gt;Initialize status queue interrupt. &lt;/P&gt;&lt;P&gt;Initialize the status queue mode.&lt;/P&gt;&lt;P&gt;Initialize controller interrupt register.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yiping&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 26 Nov 2019 07:12:14 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2019-11-26T07:12:14Z</dc:date>
    <item>
      <title>could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034058#M9084</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;When I try to register and start qDMA function on LS1043A&lt;/P&gt;&lt;P&gt;It blocked in the first step.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;following the manual reference, we should&amp;nbsp;Disable the command queue.&lt;/P&gt;&lt;P&gt;but if set the register DMR[DQD]=1,&amp;nbsp;BaCQbMR[EN]=0,&amp;nbsp; the two register could not be write succesful&lt;/P&gt;&lt;P&gt;(the memory map is OK)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I try write manage and block register, most of them also could not be wrote successful.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;then I use TRACE32 debugged on u-boot mode, and try to modified the memory value directly&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;but it still doesn't work.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;so it there any pre-condition for the qDMA functional on LS1043A?&amp;nbsp;&lt;/P&gt;&lt;P&gt;how can we use it normally&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;P.S:&amp;nbsp; I check the CSU\ device configuration, it is OK.&amp;nbsp; and I have switch the secure state to EL3, but it does not work.&lt;/EM&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Nov 2019 08:23:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034058#M9084</guid>
      <dc:creator>ken_liu</dc:creator>
      <dc:date>2019-11-25T08:23:14Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034059#M9085</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;A _jive_internal="true" data-content-finding="Community" data-userid="347906" data-username="ken.liu@aviagesystems.com" href="https://community.nxp.com/people/ken.liu@aviagesystems.com"&gt;Ken Liu&lt;/A&gt;,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please refer to the following procedure for qDMA engine initialization:&lt;/P&gt;&lt;P&gt;Try to halt the qDMA engine first.&lt;/P&gt;&lt;P&gt;Clear the command queue interrupt detect register for all queues.&lt;/P&gt;&lt;P&gt;Initialize Command Queue registers to point to the first command descriptor in memory.&lt;/P&gt;&lt;P&gt;Initialize the queue mode.&lt;/P&gt;&lt;P&gt;Initialize status queue registers to point to the first command descriptor in memory.&lt;/P&gt;&lt;P&gt;Initialize status queue interrupt. &lt;/P&gt;&lt;P&gt;Initialize the status queue mode.&lt;/P&gt;&lt;P&gt;Initialize controller interrupt register.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yiping&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Nov 2019 07:12:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034059#M9085</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2019-11-26T07:12:14Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034060#M9086</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;There are some updates in LS1043ARM Rev5 regarding endianness of qDMA registers and descriptors. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;For LS1043A,&amp;nbsp; qDMA registers are in big-endian format and its descriptors are in little-endian format. Please confirm you have used accordingly.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I have attached U-boot commands that I had used to transfer data from DDR (0xa000_0000) to PCIe EP (0x48_0000_0000) on LS1046ARDB (Same can be applied for LS1043A as well with different addresses) using command queue. Hope this will help you to understand it better.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Please check it and let me know about it. &lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Nov 2019 07:46:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034060#M9086</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2019-11-27T07:46:00Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034061#M9087</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yiping Wang&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot for your reply.&amp;nbsp; I still blocked on the first steps.&amp;nbsp;following the first steps your suggestion: "&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Try to halt the qDMA engine first", when I use TRACE32 tool attached LS1043A on u-boot mode, try to change the qDMA register directly. (&lt;SPAN&gt;DMR[DQD],&amp;nbsp;BaCQbMR[EN]), but the register could not be access.(could not be changed)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;May be I miss or make some mistake. so I have two questions&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Q1: for the step one:&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Try to halt the qDMA engine first",&amp;nbsp; I try to change the&amp;nbsp;&lt;SPAN&gt;DMR[DQD] and BaCQbMR[EN] register value, is it right?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Q2: following the&amp;nbsp;QorIQ LS1043A Reference Manual, Rev. 5, the&amp;nbsp;Privileged registers may should be access under&amp;nbsp;hypervisor mode. so I switch the exception level to EL3.&amp;nbsp; but it still does not work.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;so pls give us a suggestion way to access the&amp;nbsp;&lt;SPAN style="background-color: #ffffff;"&gt;Privileged registers&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;thank you very much&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Dec 2019 07:06:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034061#M9087</guid>
      <dc:creator>ken_liu</dc:creator>
      <dc:date>2019-12-05T07:06:48Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034062#M9088</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;the TRACE32 tool Directly operate the register:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/95527iB7DD187129097254/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Dec 2019 07:27:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034062#M9088</guid>
      <dc:creator>ken_liu</dc:creator>
      <dc:date>2019-12-05T07:27:59Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034063#M9089</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="margin: 0cm 0cm 0pt;"&gt;&lt;SPAN&gt;Q1: for the step one: "Try to halt the qDMA engine first", I try to change the DMR[DQD] and BaCQbMR[EN] register value, is it right?&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 0pt;"&gt;&lt;SPAN&gt;[NXP] Yes, it is right.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 0pt;"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 0pt;"&gt;&lt;SPAN&gt;Q2: following the QorIQ LS1043A Reference Manual, Rev. 5, the Privileged registers may should be access under hypervisor mode. so I switch the exception level to EL3. but it still does not work.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 0pt;"&gt;&lt;SPAN&gt;so pls give us a suggestion way to access the Privileged registers [NXP] The Central Security Unit (CSU) sets access privilege levels for peripherals. Please check the config security level of qDMA registers at 0x151_0040. Unlock it using L1 bit and enable all SL0:7 for qDMA registers. For more details, refer CSU Memory Map/Register Definition of LS1043ARM.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 0pt;"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 0pt;"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 0pt;"&gt;&lt;SPAN&gt;Please share the following details:&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 0pt;"&gt;&lt;SPAN&gt;3) Have you try it on LS1043ARDB and able to replicate the issue? &lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 0pt;"&gt;&lt;SPAN&gt;4) Please provide the steps which you have followed and log too. &lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 06 Dec 2019 09:50:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034063#M9089</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2019-12-06T09:50:06Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034064#M9090</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp; Yiping&lt;/P&gt;&lt;P&gt;Thank you so much for your reply.&lt;/P&gt;&lt;P&gt;I have try to set the CSU register before, but it still does not work.&lt;/P&gt;&lt;P&gt;pls shown my steps as following&lt;/P&gt;&lt;P&gt;I use TRACE32 tool attach LS1043A board in u-boot mode, [u-boot version:&amp;nbsp;U-Boot 2017.07-g503eff0 ]&lt;/P&gt;&lt;P&gt;then :&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;1. set CSU_CSL register and try to halt qDMA engine, but&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;DMR[DQD] and BaCQbMR[EN] could not be set&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/95974i9BCDFC74C8263F22/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;2. I also try enable all the CSU_SA register as below, but qDMA register still can not be write&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_3.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/95975i22D86D87340601F8/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_3.png" alt="pastedImage_3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;3.&amp;nbsp; I short the J13 and make&amp;nbsp;TA_PROG_SFP power on. follow ARMv8 A53 framework. I enable all the register of the SCTLR_EL and HCR_EL2 or SCTLR_EL3 section to switch the EL2(hyp) or EL3 security level. but it still does not work&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/95976i879501B96745E49E/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_5.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/95978i5853616AB9040031/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_5.png" alt="pastedImage_5.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;4.&amp;nbsp; the DMA1 register in DCFG_DEVDISR1 is also set to enabled.(follow the device control on manual ref)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;by the way , on the default setting . only&amp;nbsp;&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;DMR[DQOS] and&amp;nbsp;&lt;SPAN&gt;DMR[TCD] and a few interrupt register can be changed.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;but other important register still can not be write.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;I&amp;nbsp;access register bit&amp;nbsp;directly on TRACE32 tool. so the address and little/&lt;SPAN style="background-color: #ffffff;"&gt;big-endian format should not effect the result&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN style="background-color: #ffffff; "&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN style="background-color: #ffffff; "&gt;pls help me review the problem.&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN style="background-color: #ffffff; "&gt;thank you very much&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Dec 2019 07:20:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034064#M9090</guid>
      <dc:creator>ken_liu</dc:creator>
      <dc:date>2019-12-09T07:20:05Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034065#M9091</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Ken Liu,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;unfortunately, the endianness in the peripheral file for LS1043A is set to 'little' for qDMA, but it has to be set to 'big'.&lt;/P&gt;&lt;P&gt;We are working on a fix for this.&lt;/P&gt;&lt;P&gt;Please file in a request for a fixed per file at &lt;A href="mailto:support@lauterbach.com,"&gt;support@lauterbach.com,&lt;/A&gt; so that we can open a support thread for you.&lt;/P&gt;&lt;P&gt;You can also refer to me as a contact person.&lt;/P&gt;&lt;P&gt;Thanks a lot!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Benedikt&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 13 Dec 2019 10:25:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034065#M9091</guid>
      <dc:creator>benedikt_schroe</dc:creator>
      <dc:date>2019-12-13T10:25:19Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034066#M9092</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Yiping Wang,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;can you please confirm the following:&lt;/P&gt;&lt;P&gt;* At first, the entire register value has to be read in big endian&lt;/P&gt;&lt;P&gt;* When decoding a part of the register, e.g. a bit field that spans accross multiple bits, those value has to be interpreted in little endian again?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your help!&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Benedikt&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 13 Dec 2019 10:36:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034066#M9092</guid>
      <dc:creator>benedikt_schroe</dc:creator>
      <dc:date>2019-12-13T10:36:21Z</dc:date>
    </item>
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      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034067#M9093</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Benedikt,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Let me explain to you with an example:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;When you access qDMA register (Big-endian format) on U-Boot:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;1) Assume read value: 12 34 56 78&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; U-Boot command: md &amp;lt;qdma_register_addr&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;2) Do byte swapping for decoding register. Field values directly compared with description given in RM.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Byte Swapped value: 78 56 34 12&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;3) To modify the register, do it with swapped value:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Modifying 78 as FF&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Modified value: FF 56 34 12&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;4) Writing to register, byte swapped again:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Written value: 12 34 56 FF&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; U-Boot command: mw.l &amp;lt;qdma_register_addr&amp;gt; 123456FF&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Another example to set B0CQ0MR[EN], use below command:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;mw.l 83A0800 00000080&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;While decoding the register, you will byte-swapped: 80 00 00 00 You can see in the RM, MSB is for EN. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Let me know if you have any confusion to understand it.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Yiping&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 17 Dec 2019 06:27:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034067#M9093</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2019-12-17T06:27:00Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034068#M9094</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Yiping,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks a lot for the detailed example, this is very helpful!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Benedikt&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Dec 2019 06:44:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034068#M9094</guid>
      <dc:creator>benedikt_schroe</dc:creator>
      <dc:date>2019-12-20T06:44:16Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034069#M9095</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Ken Liu,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;having checked your issue, we think you are probably using an older version of the per file.&lt;/P&gt;&lt;P&gt;Please request an update from &lt;A href="mailto:support@lauterbach.com"&gt;support@lauterbach.com&lt;/A&gt; .&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Benedikt&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Dec 2019 06:45:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1034069#M9095</guid>
      <dc:creator>benedikt_schroe</dc:creator>
      <dc:date>2019-12-20T06:45:39Z</dc:date>
    </item>
    <item>
      <title>Re: could not use qDMA feature on LS1043A board</title>
      <link>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1835681#M11948</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/52411"&gt;@yipingwang&lt;/a&gt;. We are using the LS1043ARDB and would very much like to perform a DDR-to-DDR DMA using the qDMA engine in U-boot:&lt;BR /&gt;&lt;BR /&gt;"I have attached U-boot commands that I had used to transfer data from DDR (0xa000_0000) to PCIe EP (0x48_0000_0000) on LS1046ARDB (Same can be applied for LS1043A as well with different addresses) using command queue. Hope this will help you to understand it better."&lt;BR /&gt;I could not find the attachment with the commands in this thread. Can you re-post or e-mail them directly to me:&lt;BR /&gt;&lt;BR /&gt;gregg.allen@seakr.com&lt;/P&gt;</description>
      <pubDate>Tue, 26 Mar 2024 19:35:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/could-not-use-qDMA-feature-on-LS1043A-board/m-p/1835681#M11948</guid>
      <dc:creator>gregg_allen</dc:creator>
      <dc:date>2024-03-26T19:35:50Z</dc:date>
    </item>
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