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    <title>topic How to configure the register to set up flow-to-core affinity in Qoriq P2040  in QorIQ</title>
    <link>https://community.nxp.com/t5/QorIQ/How-to-configure-the-register-to-set-up-flow-to-core-affinity-in/m-p/688271#M5401</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I need to make the specific vlan id's packets flow to a specific CPU in Qoriq P2040 to keep this vlan id 's data flow in&amp;nbsp;order.&lt;/P&gt;&lt;P&gt;So I need to configure the parse module and keyGen module in Fman in DPAA according to &amp;lt;QorIQ DPAA Primer for Software&amp;nbsp;Architecture&amp;gt;.&lt;/P&gt;&lt;P&gt;But I failed to find a ducument to descripe the detal procedure to configure the registers like the description in &amp;lt;WBNR_FTF10_NET_F0681_PDF.pdf&amp;gt;. This document skip the PCD module when configure Fman.&lt;/P&gt;&lt;P&gt;Could you please help to tell me the detail procedure to implement the function?&lt;/P&gt;&lt;P&gt;Thanks for your support,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Jie&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 15 Jun 2017 06:55:09 GMT</pubDate>
    <dc:creator>wangjie</dc:creator>
    <dc:date>2017-06-15T06:55:09Z</dc:date>
    <item>
      <title>How to configure the register to set up flow-to-core affinity in Qoriq P2040</title>
      <link>https://community.nxp.com/t5/QorIQ/How-to-configure-the-register-to-set-up-flow-to-core-affinity-in/m-p/688271#M5401</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I need to make the specific vlan id's packets flow to a specific CPU in Qoriq P2040 to keep this vlan id 's data flow in&amp;nbsp;order.&lt;/P&gt;&lt;P&gt;So I need to configure the parse module and keyGen module in Fman in DPAA according to &amp;lt;QorIQ DPAA Primer for Software&amp;nbsp;Architecture&amp;gt;.&lt;/P&gt;&lt;P&gt;But I failed to find a ducument to descripe the detal procedure to configure the registers like the description in &amp;lt;WBNR_FTF10_NET_F0681_PDF.pdf&amp;gt;. This document skip the PCD module when configure Fman.&lt;/P&gt;&lt;P&gt;Could you please help to tell me the detail procedure to implement the function?&lt;/P&gt;&lt;P&gt;Thanks for your support,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Jie&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Jun 2017 06:55:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/QorIQ/How-to-configure-the-register-to-set-up-flow-to-core-affinity-in/m-p/688271#M5401</guid>
      <dc:creator>wangjie</dc:creator>
      <dc:date>2017-06-15T06:55:09Z</dc:date>
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