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    <title>topic Re: Input Pins configuration while reset activated in PowerQUICC Processors</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365089#M918</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please, refer to section 2.2 "Power Sequencing" of MPC8306EC:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;"if the I/O voltages are supplied before the core voltage, there might be a period of time that all input and output pins are actively driven and cause contention and excessive current. In order to avoid actively driving the I/O pins and to eliminate excessive current draw, apply the core voltage (VDD) before the I/O voltage (GVDD and OVDD) and assert PORESET before the power supplies fully ramp up".&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Pavel&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 30 Oct 2014 09:10:03 GMT</pubDate>
    <dc:creator>LPP</dc:creator>
    <dc:date>2014-10-30T09:10:03Z</dc:date>
    <item>
      <title>Input Pins configuration while reset activated</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365088#M917</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are having problems with a MPC8306 input pins configuration while PORESETsignal is active. The issue is that pins configured as inputs are not acting as input as expected and they have a logic 1 value instead.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;¿Any idea about what's happening?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance.:smileyblush:&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Oct 2014 08:55:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365088#M917</guid>
      <dc:creator>jesusgonzalez</dc:creator>
      <dc:date>2014-10-30T08:55:15Z</dc:date>
    </item>
    <item>
      <title>Re: Input Pins configuration while reset activated</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365089#M918</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please, refer to section 2.2 "Power Sequencing" of MPC8306EC:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;"if the I/O voltages are supplied before the core voltage, there might be a period of time that all input and output pins are actively driven and cause contention and excessive current. In order to avoid actively driving the I/O pins and to eliminate excessive current draw, apply the core voltage (VDD) before the I/O voltage (GVDD and OVDD) and assert PORESET before the power supplies fully ramp up".&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Pavel&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Oct 2014 09:10:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365089#M918</guid>
      <dc:creator>LPP</dc:creator>
      <dc:date>2014-10-30T09:10:03Z</dc:date>
    </item>
    <item>
      <title>Re: Input Pins configuration while reset activated</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365090#M919</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Just to clarify the situation:&lt;/P&gt;&lt;P&gt;PORESET is not a Power up reset but a warm reset initiated by user after system is steady.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Oct 2014 09:40:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365090#M919</guid>
      <dc:creator>jesusgonzalez</dc:creator>
      <dc:date>2014-10-30T09:40:51Z</dc:date>
    </item>
    <item>
      <title>Re: Input Pins configuration while reset activated</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365091#M920</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Any other sugestion?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 31 Oct 2014 07:47:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365091#M920</guid>
      <dc:creator>jesusgonzalez</dc:creator>
      <dc:date>2014-10-31T07:47:53Z</dc:date>
    </item>
    <item>
      <title>Re: Input Pins configuration while reset activated</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365092#M921</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;There might be due to improper functioning of JTAG/COP port. Please, check if the port connections comply Freescale recommendations in AN4231 Design Checklist for MPC8306 Processor.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Critical things:&lt;/P&gt;&lt;P&gt;- PORESET should cause TRST&lt;/P&gt;&lt;P&gt;- pull-ups on TCK. It does not have an internal pull-up, and requires an external one if not used. There is a pullup on TMS but it &lt;SPAN class="&amp;amp;quothighlight&amp;quot;"&gt;&lt;STRONG&gt;is&lt;/STRONG&gt;&lt;/SPAN&gt; always safer to put a pullup on &lt;SPAN class="&amp;amp;quothighlight&amp;quot;"&gt;&lt;STRONG&gt;TCK&lt;/STRONG&gt;&lt;/SPAN&gt; however, because then we will not have a floating input.&lt;/P&gt;&lt;P&gt;.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Nov 2014 10:25:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Input-Pins-configuration-while-reset-activated/m-p/365092#M921</guid>
      <dc:creator>LPP</dc:creator>
      <dc:date>2014-11-05T10:25:38Z</dc:date>
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