<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Question about MPC8280's SDRAM machine in PowerQUICC Processors</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291661#M583</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;Here is a project use MPC8280. I use SDRAM machine connect SDRAM(32M16A2).The SDRAM have 4 internal banks, 13 rows, and 10 columns.&lt;/P&gt;&lt;P&gt;I&amp;nbsp; reference 《MPC8280RM Rev. 1, 12/2005》,11.4.5.2 SDRAM Address Multiplexing (SDAM and BSMA),but still have same&lt;/P&gt;&lt;P&gt;questions.&lt;/P&gt;&lt;P&gt;The reference book have examples,but all the examples are about SDRAM devices that have 4 internal banks, 12 rows, and 9 columns.&lt;/P&gt;&lt;P&gt;I copy the tables below.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My question is:&lt;/P&gt;&lt;P&gt;what is the meaning "-",is that I cann't use the pin?&lt;/P&gt;&lt;P&gt;for example I set SDMR[SDAM] = 100; Can I use A[14–15] for bank select pins?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="未命名.bmp"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/39386i95610BF65F1E22D1/image-size/large?v=v2&amp;amp;px=999" role="button" title="未命名.bmp" alt="未命名.bmp" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 14 Jun 2013 07:44:06 GMT</pubDate>
    <dc:creator>春新张</dc:creator>
    <dc:date>2013-06-14T07:44:06Z</dc:date>
    <item>
      <title>Question about MPC8280's SDRAM machine</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291661#M583</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;Here is a project use MPC8280. I use SDRAM machine connect SDRAM(32M16A2).The SDRAM have 4 internal banks, 13 rows, and 10 columns.&lt;/P&gt;&lt;P&gt;I&amp;nbsp; reference 《MPC8280RM Rev. 1, 12/2005》,11.4.5.2 SDRAM Address Multiplexing (SDAM and BSMA),but still have same&lt;/P&gt;&lt;P&gt;questions.&lt;/P&gt;&lt;P&gt;The reference book have examples,but all the examples are about SDRAM devices that have 4 internal banks, 12 rows, and 9 columns.&lt;/P&gt;&lt;P&gt;I copy the tables below.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My question is:&lt;/P&gt;&lt;P&gt;what is the meaning "-",is that I cann't use the pin?&lt;/P&gt;&lt;P&gt;for example I set SDMR[SDAM] = 100; Can I use A[14–15] for bank select pins?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="未命名.bmp"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/39386i95610BF65F1E22D1/image-size/large?v=v2&amp;amp;px=999" role="button" title="未命名.bmp" alt="未命名.bmp" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Jun 2013 07:44:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291661#M583</guid>
      <dc:creator>春新张</dc:creator>
      <dc:date>2013-06-14T07:44:06Z</dc:date>
    </item>
    <item>
      <title>Re: Question about MPC8280's SDRAM machine</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291662#M584</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am afraid no, if setting SDAM to be "100", you can not use A14 and A15.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Jun 2013 09:59:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291662#M584</guid>
      <dc:creator>lunminliang</dc:creator>
      <dc:date>2013-06-18T09:59:10Z</dc:date>
    </item>
    <item>
      <title>Re: Question about MPC8280's SDRAM machine</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291663#M585</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: #ffffff;"&gt;"-" in the table means no address muxing for SDRAM's address signals during ACTIVATE command. This does not relate to the bank select signals, only to address ones. Muxing of bank select signals is defined by the &lt;SPAN style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: #ffffff;"&gt;xSDRAM[BSMA]&lt;/SPAN&gt; field. The answer to your question: yes, you can use &lt;SPAN style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: #ffffff;"&gt;A[14–15] as bank selects if xSDRAM[BSMA] is properly set (BSMA=0b001).&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Jun 2013 11:26:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291663#M585</guid>
      <dc:creator>Bulat</dc:creator>
      <dc:date>2013-06-18T11:26:44Z</dc:date>
    </item>
    <item>
      <title>Re: Question about MPC8280's SDRAM machine</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291664#M586</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Just to add to the Bulat' response - this setup "&lt;SPAN style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: #ffffff;"&gt;4 internal banks, 13 rows, and 10 columns" is described as Example 1 in application note AN2165 "MPC8260 SDRAM Support".&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://cache.freescale.com/files/32bit/doc/app_note/AN2165.pdf"&gt;http://cache.freescale.com/files/32bit/doc/app_note/AN2165.pdf&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Jun 2013 12:23:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291664#M586</guid>
      <dc:creator>alexander_yakov</dc:creator>
      <dc:date>2013-06-18T12:23:44Z</dc:date>
    </item>
    <item>
      <title>Re: Question about MPC8280's SDRAM machine</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291665#M587</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Sorry, I made a mistake here. The Table 11-20 is for address multiplexing of row address, here "-" means for that "SDAM" configuration the physical address kine will not ouput mux address. A[14-15] can be used for bank select if configured by BSMA.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Jun 2013 01:50:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Question-about-MPC8280-s-SDRAM-machine/m-p/291665#M587</guid>
      <dc:creator>lunminliang</dc:creator>
      <dc:date>2013-06-20T01:50:03Z</dc:date>
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  </channel>
</rss>

