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    <title>topic i2c: Is This a Bug? in PowerQUICC Processors</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/i2c-Is-This-a-Bug/m-p/152044#M56</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a design based on the MPC8349EA processor. While perusing the driver source from my Linux 2.6.35.2 kernel (drivers/i2c/busses/i2c-mpc.c) I came across the following function:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;/* Sometimes 9th clock pulse isn't generated, and slave doesn't release&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt; * the bus, because it wants to send ACK.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt; * Following sequence of enabling/disabling and sending start/stop generates&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt; * the pulse, so it's all OK.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt; */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;static void mpc_i2c_fixup(struct mpc_i2c *i2c)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; writeccr(i2c, 0);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; udelay(30);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; writeccr(i2c, CCR_MEN);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; udelay(30);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; writeccr(i2c, CCR_MSTA | CCR_MTX);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; udelay(30);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; udelay(30);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; writeccr(i2c, CCR_MEN);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; udelay(30);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Indeed, while working with the i2c, I have occasionally experienced an i2c bus hang while waiting for the ACK from the slave which this little kludge recovers from. My question is why is this needed? Is this a bug in the i2c peripheral? I see no mention of this in the errata sheet.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for any insight.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 25 Oct 2012 16:38:39 GMT</pubDate>
    <dc:creator>swarga</dc:creator>
    <dc:date>2012-10-25T16:38:39Z</dc:date>
    <item>
      <title>i2c: Is This a Bug?</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/i2c-Is-This-a-Bug/m-p/152044#M56</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a design based on the MPC8349EA processor. While perusing the driver source from my Linux 2.6.35.2 kernel (drivers/i2c/busses/i2c-mpc.c) I came across the following function:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;/* Sometimes 9th clock pulse isn't generated, and slave doesn't release&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt; * the bus, because it wants to send ACK.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt; * Following sequence of enabling/disabling and sending start/stop generates&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt; * the pulse, so it's all OK.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt; */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;static void mpc_i2c_fixup(struct mpc_i2c *i2c)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; writeccr(i2c, 0);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; udelay(30);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; writeccr(i2c, CCR_MEN);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; udelay(30);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; writeccr(i2c, CCR_MSTA | CCR_MTX);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; udelay(30);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; udelay(30);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; writeccr(i2c, CCR_MEN);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; udelay(30);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: courier new,courier;"&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Indeed, while working with the i2c, I have occasionally experienced an i2c bus hang while waiting for the ACK from the slave which this little kludge recovers from. My question is why is this needed? Is this a bug in the i2c peripheral? I see no mention of this in the errata sheet.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for any insight.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Oct 2012 16:38:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/i2c-Is-This-a-Bug/m-p/152044#M56</guid>
      <dc:creator>swarga</dc:creator>
      <dc:date>2012-10-25T16:38:39Z</dc:date>
    </item>
    <item>
      <title>Re: i2c: Is This a Bug?</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/i2c-Is-This-a-Bug/m-p/152045#M57</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Google for "mpc_i2c_fixup". That finds:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://lists.lm-sensors.org/pipermail/i2c/2007-July/001609.html" title="http://lists.lm-sensors.org/pipermail/i2c/2007-July/001609.html"&gt; [i2c] [PATCH] i2c-mpc: work around missing-9th-clock-pulse bug &lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Which points to:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://lists.ozlabs.org/pipermail/linuxppc-embedded/2005-July/019038.html" title="https://lists.ozlabs.org/pipermail/linuxppc-embedded/2005-July/019038.html"&gt;https://lists.ozlabs.org/pipermail/linuxppc-embedded/2005-July/019038.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Which states it was a problem in the MPC5200 (in 2005) that is not in the Errata, but according to the above "&lt;/P&gt;&lt;P&gt;After contacting Freescale, they recognize the problem.".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It is still not in the Errata for that chip, but I'm not surprised at that.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;These silicon modules are used in lots of different chips, so it is possible the MPC5200 bug is in the MPC8349 as well. I suggest you download the MPC5200 manual and compare the I2C controller register set with your one to see if they match.&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here's some more tracking of old I2C bugs that might be worth checking through:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.digipedia.pl/usenet/thread/11185/30289/" title="http://www.digipedia.pl/usenet/thread/11185/30289/"&gt;http://www.digipedia.pl/usenet/thread/11185/30289/&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tom&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Oct 2012 01:28:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/i2c-Is-This-a-Bug/m-p/152045#M57</guid>
      <dc:creator>TomE</dc:creator>
      <dc:date>2012-10-30T01:28:32Z</dc:date>
    </item>
    <item>
      <title>Re: i2c: Is This a Bug?</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/i2c-Is-This-a-Bug/m-p/152046#M58</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We also get hang of i2c bus at p1020 while slave devices reboot. Kernels 2.6.29 and 3.4.85 return errors EIO (Input/Output error) or ETIMEDOUT (Connection timed out).&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Jul 2017 09:58:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/i2c-Is-This-a-Bug/m-p/152046#M58</guid>
      <dc:creator>nikitavostokov</dc:creator>
      <dc:date>2017-07-12T09:58:12Z</dc:date>
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