<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>PowerQUICC ProcessorsのトピックRe: LS1028A based board booting issue</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/LS1028A-based-board-booting-issue/m-p/2037003#M4792</link>
    <description>&lt;P&gt;Dear&amp;nbsp;&lt;SPAN&gt;Hector&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thank you for you reply.&lt;/P&gt;&lt;P&gt;This is the issue with the only few boards. Other boards are booting with this firmware. We are suspecting th emounting of DDR ICs.&lt;/P&gt;&lt;P&gt;With Regards&lt;/P&gt;&lt;P&gt;Krishnam Raju M&lt;/P&gt;</description>
    <pubDate>Mon, 03 Feb 2025 04:17:56 GMT</pubDate>
    <dc:creator>mkraj</dc:creator>
    <dc:date>2025-02-03T04:17:56Z</dc:date>
    <item>
      <title>LS1028A based board booting issue</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/LS1028A-based-board-booting-issue/m-p/2033763#M4788</link>
      <description>&lt;P&gt;Dear NXP team&lt;/P&gt;&lt;P&gt;We have developed a NXP LS1028A based board and while initial booting testing&amp;nbsp; below error message was coming&lt;/P&gt;&lt;P&gt;"NOTICE: Fixed DDR on board&lt;BR /&gt;ERROR: Found training error(s): 0x2000&lt;BR /&gt;ERROR: Error: Waiting for D_INIT timeout.&lt;BR /&gt;ERROR: Writing DDR register(s) failed&lt;BR /&gt;ERROR: Programing DDRC error&lt;BR /&gt;ERROR: DDR init failed.&lt;BR /&gt;NOTICE: BL2: v2.6(release):OpenWrt vlf-6.1.1-1.0.0-1 (ls1028a-rdb-sdboot)&lt;BR /&gt;NOTICE: BL2: Built : 22:09:42, Mar 22 2024&lt;BR /&gt;ERROR: Asserting as the DDR is not initialized yet.ERROR: SD read error - DM A error = 10000000&lt;BR /&gt;ERROR: Read error = fffffffb&lt;BR /&gt;ERROR: BL2: Failed to load image id 3 (-5)"&lt;/P&gt;&lt;P&gt;Could you please advise on&amp;nbsp; the issue?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;With Regards&lt;/P&gt;&lt;P&gt;Krishnam Raju M&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 24 Jan 2025 09:17:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/LS1028A-based-board-booting-issue/m-p/2033763#M4788</guid>
      <dc:creator>mkraj</dc:creator>
      <dc:date>2025-01-24T09:17:41Z</dc:date>
    </item>
    <item>
      <title>Re: LS1028A based board booting issue</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/LS1028A-based-board-booting-issue/m-p/2036264#M4791</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/218921"&gt;@mkraj&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope this email finds you well,&lt;/P&gt;
&lt;P&gt;The problem that you are facing is due to DDR errors.&lt;/P&gt;
&lt;P&gt;Please make sure that you modify&amp;nbsp; the appropriate&lt;SPAN&gt;&amp;nbsp;DDR controller initialization parameters.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Please refer to section "4.2.1.1 TF-A DDR Driver" from the "UG10081&lt;BR /&gt;Layerscape Linux Distribution POC User Guide" Rev. 6.1.55_2.2.0 — 24 January 2024.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;In addition please find it at the following link:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://docs.nxp.com/bundle/UG10081_LLDP_L6.1.55_2.2.0/page/topics/about_this_document.html" target="_blank"&gt;https://docs.nxp.com/bundle/UG10081_LLDP_L6.1.55_2.2.0/page/topics/about_this_document.html&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Please refer from the "4.2.1.1 TF-A DDR Driver", DDR Board Level Applications:&lt;BR /&gt;The DDR driver supports the following board level applications for DDR:&lt;BR /&gt;• DIMM: Driver reads SPD for configuring DDR timing parameters&lt;BR /&gt;• Mock DIMM: Hardcoded timing in place of reading SPD&lt;BR /&gt;• Discrete DDR: Driver requires a static DDR configuration to be added&lt;/P&gt;
&lt;P&gt;In addition I highly recommend you to use QCVS DDR tool to assist you to calculate and optimize DDR controller configuration parameters. Please refer to the attached QCVS DDR user manual.&lt;/P&gt;
&lt;P&gt;Have a great day.&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Hector Villarruel Silvadoray&lt;/P&gt;</description>
      <pubDate>Thu, 30 Jan 2025 18:20:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/LS1028A-based-board-booting-issue/m-p/2036264#M4791</guid>
      <dc:creator>Hector_Villarruel</dc:creator>
      <dc:date>2025-01-30T18:20:40Z</dc:date>
    </item>
    <item>
      <title>Re: LS1028A based board booting issue</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/LS1028A-based-board-booting-issue/m-p/2037003#M4792</link>
      <description>&lt;P&gt;Dear&amp;nbsp;&lt;SPAN&gt;Hector&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thank you for you reply.&lt;/P&gt;&lt;P&gt;This is the issue with the only few boards. Other boards are booting with this firmware. We are suspecting th emounting of DDR ICs.&lt;/P&gt;&lt;P&gt;With Regards&lt;/P&gt;&lt;P&gt;Krishnam Raju M&lt;/P&gt;</description>
      <pubDate>Mon, 03 Feb 2025 04:17:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/LS1028A-based-board-booting-issue/m-p/2037003#M4792</guid>
      <dc:creator>mkraj</dc:creator>
      <dc:date>2025-02-03T04:17:56Z</dc:date>
    </item>
    <item>
      <title>Re: LS1028A based board booting issue</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/LS1028A-based-board-booting-issue/m-p/2037442#M4793</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/218921"&gt;@mkraj&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope this post finds you well,&lt;/P&gt;
&lt;P&gt;Regarding your last reply,&lt;/P&gt;
&lt;P&gt;Due to this information, I recommend you to check your soldering and manufacturing process of your boards since this issue it is only presented in a few of your devices.&lt;/P&gt;
&lt;P&gt;In reference Kindly refer to the AN13656 "Assembly guidelines for Flip Chip plastic ball grid array and chip scale package" located at the following link:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13656.pdf" target="_self"&gt;https://www.nxp.com/docs/en/application-note/AN13656.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;In addition I would like to provide you with the AN3300 "General Soldering Temperature Process Guidelines" locates at the following link:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN3300.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN3300.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a great day.&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Hector Villarruel Silvadoray&lt;/P&gt;</description>
      <pubDate>Tue, 04 Feb 2025 00:32:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/LS1028A-based-board-booting-issue/m-p/2037442#M4793</guid>
      <dc:creator>Hector_Villarruel</dc:creator>
      <dc:date>2025-02-04T00:32:10Z</dc:date>
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  </channel>
</rss>

