https://community.nxp.com/t5/PowerQUICC-Processors/T1024-DDR-VALIDATION-PROBLEM/m-p/1712437#M4467 <P>The development board based on T1024 uses 5 MT40A256M26LY-062E DDR4 chips. Below are the settings in DDRTOOL, as well as the verification results and logs. No matter how the DDR configuration is changed, the results are the same. in addition, the Relative delay time of between MCKE signal and ddr_RST is about 2S.would you like to inquire if there is a problem with the settings or provide some ideas to solve the problem? Thank you</P><P>&nbsp;</P> Mon, 28 Aug 2023 14:03:10 GMT Jaygao 2023-08-28T14:03:10Z https://community.nxp.com/t5/PowerQUICC-Processors/T1024-DDR-VALIDATION-PROBLEM/m-p/1712437#M4467 <P>The development board based on T1024 uses 5 MT40A256M26LY-062E DDR4 chips. Below are the settings in DDRTOOL, as well as the verification results and logs. No matter how the DDR configuration is changed, the results are the same. in addition, the Relative delay time of between MCKE signal and ddr_RST is about 2S.would you like to inquire if there is a problem with the settings or provide some ideas to solve the problem? Thank you</P><P>&nbsp;</P> Mon, 28 Aug 2023 14:03:10 GMT https://community.nxp.com/t5/PowerQUICC-Processors/T1024-DDR-VALIDATION-PROBLEM/m-p/1712437#M4467 Jaygao 2023-08-28T14:03:10Z