<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>PowerQUICC ProcessorsのトピックRe: MPC8306 UCC problem</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8306-UCC-problem/m-p/1519644#M4246</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/169327"&gt;@gangadhar1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;We are faced the similar issue.&lt;/P&gt;&lt;P&gt;How did you fix this problem?&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
    <pubDate>Fri, 09 Sep 2022 01:44:26 GMT</pubDate>
    <dc:creator>Sw2</dc:creator>
    <dc:date>2022-09-09T01:44:26Z</dc:date>
    <item>
      <title>MPC8306 UCC problem</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8306-UCC-problem/m-p/804777#M2493</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #4a4a4d; background-color: #f2f2f5;"&gt;we programmed both the ucc in hdlc mode(NMSI) . when both ucc are enabled simultaneously, one of the ucc stops working.please let us know any fix is necessary.&amp;nbsp; Development environment used is LTIB software.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #4a4a4d; background-color: #f2f2f5;"&gt;I am getting CRC ERROR on UCC5(enabled first) and UCC7 is working fine.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;hdlc0 Link encap:Point-to-Point Protocol&lt;BR /&gt; inet addr:10.0.0.1 P-t-P:10.0.0.2 Mask:255.255.255.0&lt;BR /&gt; UP POINTOPOINT NOARP MTU:1500 Metric:1&lt;BR /&gt; RX packets:0 errors:0 &lt;STRONG&gt;dropped:14 overruns:0 frame:14&lt;/STRONG&gt;&lt;BR /&gt; TX packets:30 errors:0 dropped:0 overruns:0 carrier:0&lt;BR /&gt; collisions:0 txqueuelen:16&lt;/P&gt;&lt;P&gt;RX bytes:0 (0.0 b) TX bytes:88 (88.0 b)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;hdlc1 Link encap:Point-to-Point Protocol&lt;BR /&gt; inet addr:20.0.0.1 P-t-P:20.0.0.2 Mask:255.255.255.0&lt;BR /&gt; UP POINTOPOINT RUNNING NOARP MTU:1500 Metric:1&lt;BR /&gt; RX packets:292 errors:0 dropped:0 overruns:0 frame:0&lt;BR /&gt; TX packets:293 errors:0 dropped:0 overruns:0 carrier:0&lt;BR /&gt; collisions:0 txqueuelen:16&lt;/P&gt;&lt;P&gt;RX bytes:3504 (3.4 Kb) TX bytes:3504 (3.4 Kb)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Packets are dropped due to CRC error in BD's.&lt;/P&gt;&lt;P&gt;please suggest how to fix this.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 06 Nov 2018 12:28:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8306-UCC-problem/m-p/804777#M2493</guid>
      <dc:creator>gangadhar1</dc:creator>
      <dc:date>2018-11-06T12:28:56Z</dc:date>
    </item>
    <item>
      <title>Re: MPC8306 UCC problem</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8306-UCC-problem/m-p/804778#M2494</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;1. Please submit me your UCC external connections schematic for analysis. &lt;BR /&gt; &lt;BR /&gt;2. Please try reducing transmission speed (transmission frequency) at remote side (at the side, which is used for transmission the data, which is received with errors). Please try reducing this frequency for short time, for test purposes only. I do understand that your design can not be used at this reduced frequency, however please test this to distinguish between error caused by QE overload and error caused by configuration errors. Please check if the problem appears at reduced frequency to exclude overload-related erratic behavior.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Alexander&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 11 Nov 2018 20:51:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8306-UCC-problem/m-p/804778#M2494</guid>
      <dc:creator>alexander_yakov</dc:creator>
      <dc:date>2018-11-11T20:51:53Z</dc:date>
    </item>
    <item>
      <title>Re: MPC8306 UCC problem</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8306-UCC-problem/m-p/804779#M2495</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We did try 64KHz(minimum frequency we can try )clock&amp;nbsp; rate but results are same CRC errors on RX side. &lt;BR /&gt;For your reference I am attaching schematics &lt;BR /&gt; &lt;BR /&gt;Gangadhar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Nov 2018 07:40:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8306-UCC-problem/m-p/804779#M2495</guid>
      <dc:creator>gangadhar1</dc:creator>
      <dc:date>2018-11-12T07:40:39Z</dc:date>
    </item>
    <item>
      <title>Re: MPC8306 UCC problem</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8306-UCC-problem/m-p/1519644#M4246</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/169327"&gt;@gangadhar1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;We are faced the similar issue.&lt;/P&gt;&lt;P&gt;How did you fix this problem?&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Fri, 09 Sep 2022 01:44:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8306-UCC-problem/m-p/1519644#M4246</guid>
      <dc:creator>Sw2</dc:creator>
      <dc:date>2022-09-09T01:44:26Z</dc:date>
    </item>
  </channel>
</rss>

