MPC8548E DDR2 Interface - MCK, MCKE, MCS, MODT Signals interfacing with 4 DDR2 discrete chips

sagar_bn — Thu, 05 May 2022 10:26:17 GMT

Hello All,

I'm interfacing MPC8548E with Four MT47H64M16NF-25E DDR2 memories to have x64 data bus width and total memory size of 4Gb. I have doubt in connecting MCK(Clock), MCKE(Clock Enable), MCS(Chip Select) and MODT Signals since there are multiple pins available for these signals.

As per above description, I'm using 4 discrete DDR2 chips with clock rate of 200MHz.

DDR Signal connectivity Details:

1st DDR: MODT(0), MCS(0), MCKE(0), Data(0 to 15) and its Strobe, Address and other lines are shared, MCK0

2nd DDR: MODT(1), MCS(1), MCKE(1), Data(16 to 31) and its Strobe, Address and other lines are shared, MCK1

3rd DDR: MODT(2), MCS(2), MCKE(2), Data(32 to 47) and its Strobe, Address and other lines are shared, MCK2

4th DDR: MODT(3), MCS(3), MCKE(3), Data(48 to 63) and its Strobe, Address and other lines are shared, MCK3

Can I have above DDR memory topology and configuration ?

1. Can I have dedicated Clock signals(MCK) to each DDR memory ICs or should I share a single clock MCK_0 to all Four DDR ICs ?

2. Can I have dedicated Clock Enable(MCKE) signals to each DDR memory ICs or should I share a single MCKE_0 to all Four DDR ICs ?

3. Can I have dedicated Chip select(MCS) signals to each DDR memory ICs or should I share a single MCS_0 to all Four DDR ICs ?'

4. Can I have dedicated ODT(MODT) signals to each DDR memory ICs or should I share a single MODT_0 to all Four DDR ICs ?

Please guide and help me for my DDR2 interface connectivity between Processor MPC8548E and discrete DDR2 chips.

topic MPC8548E DDR2 Interface - MCK, MCKE, MCS, MODT Signals interfacing with 4 DDR2 discrete chips in PowerQUICC Processors

MPC8548E DDR2 Interface - MCK, MCKE, MCS, MODT Signals interfacing with 4 DDR2 discrete chips