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    <title>topic Re: Boot P1020WLAN by SD (SDHC) in PowerQUICC Processors</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255222#M408</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;Hi Arashaz,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;The default support boot mode is NOR flash on P1020WLAN. There is no DIP switch to change boot mode to SD boot.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;But there is a workaround to rework the board to support SD. Change cfg_rom_loc[0:3]=0111. Only populate R108.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;Below figure show the layout location for R108.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119411i3EBD88BD2EC2C34E/image-size/large?v=v2&amp;amp;px=999" title="&amp;amp;#22270;&amp;amp;#20687; 12.png" alt="&amp;amp;#22270;&amp;amp;#20687; 12.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119412i31C2E9C6171959EC/image-size/large?v=v2&amp;amp;px=999" title="P1.png" alt="P1.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 21 Jun 2013 06:46:38 GMT</pubDate>
    <dc:creator>paulgan</dc:creator>
    <dc:date>2013-06-21T06:46:38Z</dc:date>
    <item>
      <title>Boot P1020WLAN by SD (SDHC)</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255218#M404</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;Since there is no DIP switch on the P1020WLAN Rev. D&amp;nbsp; board, we appreciate to know how the board can be boot by a SD card (SDHC). Note that we have done all the steps mentioned in the document called Booting from On-Chip ROM (eSDHC or eSPI) for P1020 family and we have the SD card ready . But, it seems we need to change cfg_rom_loc[0:3], which seems impractical on this board. Thank you for your comments. &lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 24 May 2013 15:17:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255218#M404</guid>
      <dc:creator>arashaz_</dc:creator>
      <dc:date>2013-05-24T15:17:43Z</dc:date>
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    <item>
      <title>Re: Boot P1020WLAN by SD (SDHC)</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255219#M405</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Arashaz,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Take a look in PORBMSR register (in ROM_LOC field more exactly) to see which is right now the default rom_location set it up now by the FPGA code (having no DIP SW on the board is pretty sure that the cfg_rom_loc is driven by FPGA).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can't use PMUXCR register from software (this is fully focus on soc level muxing, not for POR stuff which are read-only).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Basically, you have 2 options:&lt;/P&gt;&lt;P&gt;1. use the flash/boot method suggested by cfg_rom_loc from PORBMSR........or&lt;/P&gt;&lt;P&gt;2. update the FPGA to use your specific cfg_rom_loc (I'm not familiar with FGPA code -- maybe a hardware guy can help on this side).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Marius&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 May 2013 06:30:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255219#M405</guid>
      <dc:creator>marius_grigoras</dc:creator>
      <dc:date>2013-05-27T06:30:35Z</dc:date>
    </item>
    <item>
      <title>Re: Boot P1020WLAN by SD (SDHC)</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255220#M406</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;Thank you very much Marius. It was very useful.&lt;/P&gt;&lt;P&gt; Just to note that I found a set of 4 DIP switches called SW2 on the P102WLAN board, but it seems they are not related. I tested all possibilities and there was no change in the boot process. &lt;/P&gt;&lt;P&gt;Just to make sure, by FPGA, do you mean the CPLD code? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards, &lt;/P&gt;&lt;P&gt; &lt;SPAN lang="EN-US" style="font-size: 11.0pt; font-family: 'Calibri','sans-serif';"&gt;Arash &lt;/SPAN&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 May 2013 07:09:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255220#M406</guid>
      <dc:creator>arashaz_</dc:creator>
      <dc:date>2013-05-27T07:09:33Z</dc:date>
    </item>
    <item>
      <title>Re: Boot P1020WLAN by SD (SDHC)</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255221#M407</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Arash,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Yes, FGPA means CPLD code.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Marius&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 May 2013 07:12:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255221#M407</guid>
      <dc:creator>marius_grigoras</dc:creator>
      <dc:date>2013-05-27T07:12:07Z</dc:date>
    </item>
    <item>
      <title>Re: Boot P1020WLAN by SD (SDHC)</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255222#M408</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;Hi Arashaz,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;The default support boot mode is NOR flash on P1020WLAN. There is no DIP switch to change boot mode to SD boot.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;But there is a workaround to rework the board to support SD. Change cfg_rom_loc[0:3]=0111. Only populate R108.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;Below figure show the layout location for R108.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119411i3EBD88BD2EC2C34E/image-size/large?v=v2&amp;amp;px=999" title="&amp;amp;#22270;&amp;amp;#20687; 12.png" alt="&amp;amp;#22270;&amp;amp;#20687; 12.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119412i31C2E9C6171959EC/image-size/large?v=v2&amp;amp;px=999" title="P1.png" alt="P1.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #1f497d;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Jun 2013 06:46:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255222#M408</guid>
      <dc:creator>paulgan</dc:creator>
      <dc:date>2013-06-21T06:46:38Z</dc:date>
    </item>
    <item>
      <title>Re: Boot P1020WLAN by SD (SDHC)</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255223#M409</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you Fulian. &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Jun 2013 23:36:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255223#M409</guid>
      <dc:creator>arashaz_</dc:creator>
      <dc:date>2013-06-21T23:36:57Z</dc:date>
    </item>
    <item>
      <title>Re: Boot P1020WLAN by SD (SDHC)</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255224#M410</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial;"&gt; There are two mandatory changes to be done in hardware to boot from sdcard from P1020Wlan board.&lt;BR /&gt;1. Populating R108 on Cfg_rom_loc[0] pin.&lt;BR /&gt;2. unpopulating R89 from cfg_sdhc_cd_pol_sel.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 10 Aug 2017 10:27:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Boot-P1020WLAN-by-SD-SDHC/m-p/255224#M410</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2017-08-10T10:27:08Z</dc:date>
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