topic P2020 uboot spl problem in PowerQUICC Processors

P2020 uboot spl problem

su007 — Fri, 21 Jan 2022 04:23:03 GMT

hello,

i have a custom p2020 board.

i use sd boot and have checked the spl code, the boot hung once set law for

ddr space. board/Freescale/p1_p2_rdb/spl.c and ddr.c is the code file.

I comment the ddr initialization, it also hung once set law for ddr. I think set law is not related with ddr.

i also try other law set. It’s ok.

can the problem is tlb related?

so strange problem.

Waiting for your reply!

Re: P2020 uboot spl problem

su007 — Fri, 21 Jan 2022 04:26:25 GMT

one more thing:

should I print all tlb entries for debug?

Re: P2020 uboot spl problem

yipingwang — Mon, 24 Jan 2022 06:35:18 GMT

The following code is in board/freescale/p1_p2_rdb_pc/ddr.c.

if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE,
ddr_size, LAW_TRGT_IF_DDR_1) < 0) {
printf("ERROR setting Local Access Windows for DDR\n");
return 0;
};

Please check whether the message "ERROR setting Local Access Windows for DDR" is printed after running set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, ddr_size, LAW_TRGT_IF_DDR_1) < 0

Please check whether DDR LAW configuration is overlapped with other LAWs configuration.