Error in Discrete DDR3L initialization

singhawadhesh — Mon, 06 Dec 2021 11:51:17 GMT

Hi Team,

We are using a discrete DDR3L on our custom board based on T2081 processor.

We tried it to test with QCVS tool, but it was failing in that with error message as DDR initialization fail: DINIT was not cleared by hardware.

To test it with u-boot driver, we configured the timing and configuration parameters of DDR from datasheet.

Now we are getting error as:

SPI boot...
Initializing....using Fixed DRAM
WARNING: Calling __hwconfig without a buffer and before environment is ready
WARNING: Calling __hwconfig without a buffer and before environment is ready
WARNING: Calling __hwconfig without a buffer and before environment is ready
WARNING: Calling __hwconfig without a buffer and before environment is ready
Initializing....using fixed DDR: fsl_ddr_board_options
Loading second stage boot loader .................................................................................................Bad trap at PC: 1000170, SR: 0, vector=e00
**bleep**: 01000170 XER: 00000000 LR: FFFD8B6C REGS: fffd7ed0 TRAP: 0e00 DAR: 00000000
MSR: 00000000 EE: 0 PR: 0 FP: 0 ME: 0 IR/DR: 00

GPR00: FFFE43B0 FFFD7FC0 FFFC8000 002BFFFF 000BFFFF FFFCB140 FFFCB140 FFFCB130
GPR08: 00000001 00200000 00200000 FFFD7FC0 FFFE3BE4 00000000 00000000 00000000
GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 01000170
GPR24: 00400000 00000000 00010000 00000000 00102000 FFFCB0F0 FFFE91C8 00102000
Call backtrace:
Exception in kernel pc 1000170 signal 0

Could you please let me know the possible root cause of this.

Thanks and Regards,

Awadhesh Singh

Re: Error in Discrete DDR3L initialization

Bulat — Wed, 08 Dec 2021 02:15:30 GMT

Error message means that DDR controller was not able to go through the DDR initialization, as a result memory is not functional. Many reasons can cause it, mistakes in the schematics, mistakes in the RCW, board level issues, incorrect DDR sw setup, problems with power supplies, including MVREF.

First I would recommend to check if the proper clock signal with expected frequency appears at the SDRAM clock pins after DDR initilalization. Use a scope for that.

topic Error in Discrete DDR3L initialization in PowerQUICC Processors

Error in Discrete DDR3L initialization

Re: Error in Discrete DDR3L initialization