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    <title>topic Re: Issues in SPI Boot on custom T2081 in PowerQUICC Processors</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/Issues-in-SPI-Boot-on-custom-T2081/m-p/1369418#M3958</link>
    <description>&lt;P&gt;&amp;gt; While DDR debug due to DDR init fail, with some changes in hardware&lt;/P&gt;&lt;P&gt;Which exactly hardware changes?&lt;/P&gt;</description>
    <pubDate>Wed, 10 Nov 2021 15:51:40 GMT</pubDate>
    <dc:creator>ufedor</dc:creator>
    <dc:date>2021-11-10T15:51:40Z</dc:date>
    <item>
      <title>Issues in SPI Boot on custom T2081</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Issues-in-SPI-Boot-on-custom-T2081/m-p/1369332#M3957</link>
      <description>&lt;P&gt;Hi Team,&lt;/P&gt;&lt;DIV&gt;We are working&amp;nbsp;on SPI NOR boot in T2081 custom board.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;We were able to load the U-boot into the SPI NOR device and it was running till DDR Initialization failed.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;While DDR debug due to DDR init fail, with some changes in hardware, now we are not able to boot-up at all.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;We have cross checked the dump of the flashed file with the input file and it's same.&amp;nbsp;&lt;SPAN&gt;Also, we have checked the loaded file and configuration of PBL from software side, it's not changed at all.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;Could you&amp;nbsp;please suggest us how to debug this issue.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks and Regards,&lt;/DIV&gt;&lt;DIV&gt;Irfan&lt;/DIV&gt;</description>
      <pubDate>Wed, 10 Nov 2021 13:14:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Issues-in-SPI-Boot-on-custom-T2081/m-p/1369332#M3957</guid>
      <dc:creator>Irfan3</dc:creator>
      <dc:date>2021-11-10T13:14:48Z</dc:date>
    </item>
    <item>
      <title>Re: Issues in SPI Boot on custom T2081</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Issues-in-SPI-Boot-on-custom-T2081/m-p/1369418#M3958</link>
      <description>&lt;P&gt;&amp;gt; While DDR debug due to DDR init fail, with some changes in hardware&lt;/P&gt;&lt;P&gt;Which exactly hardware changes?&lt;/P&gt;</description>
      <pubDate>Wed, 10 Nov 2021 15:51:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Issues-in-SPI-Boot-on-custom-T2081/m-p/1369418#M3958</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2021-11-10T15:51:40Z</dc:date>
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