<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic PCIe link goes down  randomly in PowerQUICC Processors</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-link-goes-down-randomly/m-p/1299765#M3735</link>
    <description>&lt;P&gt;In&amp;nbsp; multiple T2080 &amp;amp; P3041 boards PCIe link down error is getting triggered at random times. The PCIe error handler prints below&amp;nbsp; traces from PCI ERR handler. What I know&amp;nbsp; that link down occurs after PCIe RC detects the Hot reset event. And hot reset can be triggered in RC mode after writing into secondary bridge control register in config space. Nowhere our code can trigger hot reset implicitly. Initially I suspected, it could be a hardware issue, but&amp;nbsp; I have observed this behaviour in multiple boards. Its strange If all boards are faulty. What&amp;nbsp; &amp;nbsp;are&amp;nbsp; the other reasons which can cause PCI hot reset or link down event?&lt;/P&gt;&lt;P&gt;[ 4526.366107] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe error(s) detected&lt;BR /&gt;[ 4526.372035] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_DR register: 0x00000020&lt;BR /&gt;[ 4526.378830] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_CAP_STAT register: 0x00000107&lt;BR /&gt;[ 4526.386147] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_CAP_R0 register: 0x00000000&lt;BR /&gt;[ 4526.393289] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_CAP_R1 register: 0x00000001&lt;BR /&gt;[ 4526.400432] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_CAP_R2 register: 0x08443c01&lt;BR /&gt;[ 4526.407574] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_CAP_R3 register: 0xf000002d&lt;BR /&gt;[ 4526.414852] (c0 -31 reboot &amp;lt;1&amp;gt;) writing fields 'un-comm-peripherals'&amp;nbsp;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 29 Jun 2021 14:16:52 GMT</pubDate>
    <dc:creator>ravikumar1631</dc:creator>
    <dc:date>2021-06-29T14:16:52Z</dc:date>
    <item>
      <title>PCIe link goes down  randomly</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-link-goes-down-randomly/m-p/1299765#M3735</link>
      <description>&lt;P&gt;In&amp;nbsp; multiple T2080 &amp;amp; P3041 boards PCIe link down error is getting triggered at random times. The PCIe error handler prints below&amp;nbsp; traces from PCI ERR handler. What I know&amp;nbsp; that link down occurs after PCIe RC detects the Hot reset event. And hot reset can be triggered in RC mode after writing into secondary bridge control register in config space. Nowhere our code can trigger hot reset implicitly. Initially I suspected, it could be a hardware issue, but&amp;nbsp; I have observed this behaviour in multiple boards. Its strange If all boards are faulty. What&amp;nbsp; &amp;nbsp;are&amp;nbsp; the other reasons which can cause PCI hot reset or link down event?&lt;/P&gt;&lt;P&gt;[ 4526.366107] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe error(s) detected&lt;BR /&gt;[ 4526.372035] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_DR register: 0x00000020&lt;BR /&gt;[ 4526.378830] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_CAP_STAT register: 0x00000107&lt;BR /&gt;[ 4526.386147] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_CAP_R0 register: 0x00000000&lt;BR /&gt;[ 4526.393289] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_CAP_R1 register: 0x00000001&lt;BR /&gt;[ 4526.400432] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_CAP_R2 register: 0x08443c01&lt;BR /&gt;[ 4526.407574] (c0 -96 ksoftirqd &amp;lt;9&amp;gt;) PCIe ERR_CAP_R3 register: 0xf000002d&lt;BR /&gt;[ 4526.414852] (c0 -31 reboot &amp;lt;1&amp;gt;) writing fields 'un-comm-peripherals'&amp;nbsp;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 29 Jun 2021 14:16:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-link-goes-down-randomly/m-p/1299765#M3735</guid>
      <dc:creator>ravikumar1631</dc:creator>
      <dc:date>2021-06-29T14:16:52Z</dc:date>
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    <item>
      <title>Re: PCIe link goes down  randomly</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-link-goes-down-randomly/m-p/1301492#M3743</link>
      <description>&lt;P&gt;The PCI Express error capture registers, PEX_ERR_CAP_R0 through&lt;BR /&gt;PEX_ERR_CAP_R3, allow vital error information to be captured when an error occurs.&lt;BR /&gt;Different error information is reported depending on whether the error source is from an&lt;BR /&gt;outbound transaction from an internal source or from an inbound transaction from an&lt;BR /&gt;external source; the source of the captured error is reflected in&lt;BR /&gt;PEX_ERR_CAP_STAT[GSID]. Note that after the initial error is captured, no further&lt;BR /&gt;capturing is performed until the PEX_ERR_CAP_STAT[ECV] bit is clear.&lt;/P&gt;
&lt;P&gt;Please refer to section "20.6.1.12.4.1 Error capture registers (outbound error)" and "20.6.1.12.4.2 Error capture registers (inbound error)" in T2080 Reference manual for details.&lt;/P&gt;</description>
      <pubDate>Fri, 02 Jul 2021 03:42:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-link-goes-down-randomly/m-p/1301492#M3743</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2021-07-02T03:42:31Z</dc:date>
    </item>
  </channel>
</rss>

