topic sdram data swapping in PowerQUICC Processors https://community.nxp.com/t5/PowerQUICC-Processors/sdram-data-swapping/m-p/1039951#M3211 <HTML><HEAD></HEAD><BODY><P>I would like to know&nbsp;MPC885&nbsp; databus(31:0) connectivity&nbsp;&nbsp; to SDRAM&nbsp; MT48LC2M32. Shall we need to connect D0 of MPC885 to D0 of SDRAM or D0 of mpc885 to d31 of SDRAM. As mpc885 is in big-endian&nbsp; mode and connecting MPC885 A29--&gt; SDRAM A0. as far as data bus is concerned&nbsp; we need clarification.</P></BODY></HTML> Mon, 29 Jun 2020 11:14:32 GMT Pamid 2020-06-29T11:14:32Z sdram data swapping https://community.nxp.com/t5/PowerQUICC-Processors/sdram-data-swapping/m-p/1039951#M3211 <HTML><HEAD></HEAD><BODY><P>I would like to know&nbsp;MPC885&nbsp; databus(31:0) connectivity&nbsp;&nbsp; to SDRAM&nbsp; MT48LC2M32. Shall we need to connect D0 of MPC885 to D0 of SDRAM or D0 of mpc885 to d31 of SDRAM. As mpc885 is in big-endian&nbsp; mode and connecting MPC885 A29--&gt; SDRAM A0. as far as data bus is concerned&nbsp; we need clarification.</P></BODY></HTML> Mon, 29 Jun 2020 11:14:32 GMT https://community.nxp.com/t5/PowerQUICC-Processors/sdram-data-swapping/m-p/1039951#M3211 Pamid 2020-06-29T11:14:32Z Re: sdram data swapping https://community.nxp.com/t5/PowerQUICC-Processors/sdram-data-swapping/m-p/1039952#M3212 <HTML><HEAD></HEAD><BODY><P>You can swap byte lanes and bits inside byte lane as you want. For example you can connect byte lane D0, D1, D2..D7, BS0 of the MPC885 to D15, D13, D14…D8, DQM1 of the SDRAM MT48LC2M32. The MPC885 reads the same byte what it writes.</P></BODY></HTML> Tue, 30 Jun 2020 06:58:02 GMT https://community.nxp.com/t5/PowerQUICC-Processors/sdram-data-swapping/m-p/1039952#M3212 r8070z 2020-06-30T06:58:02Z