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    <title>PowerQUICC Processors中的主题 Why does initr_env fail to initialize when uboot starts</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/Why-does-initr-env-fail-to-initialize-when-uboot-starts/m-p/1004496#M3115</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;MPC8640 uboot boot print information is as follows：&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;initcall: eff45d50&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;U-Boot 2017.11 (Mar 05 2020 - 22:42:06 +0800)&lt;/P&gt;&lt;P&gt;initcall: eff12c4c&lt;BR /&gt;U-Boot code: EFF00000 -&amp;gt; EFF6AB00 BSS: -&amp;gt; EFF91968&lt;BR /&gt;initcall: eff05268&lt;BR /&gt;CPU: 8641, Version: 3.0, (0x80900030)&lt;BR /&gt;Core: e600 Core 0 (MSSCR0=8000, PORDEVSR=aa58700), Version: 2.2, (0x80040202)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt; CPU:1000 MHz, MPX:500 MHz&lt;BR /&gt; DDR:250 MHz (500 MT/s data rate), LBC:500 MHz&lt;BR /&gt;L1: D-cache 32 KiB enabled&lt;BR /&gt; I-cache 32 KiB enabled&lt;BR /&gt;L2: 512 KiB enabled&lt;BR /&gt;initcall: eff13644&lt;BR /&gt;initcall: eff12e18&lt;BR /&gt;I2C: Requested speed:400000, i2c_clk:250000000&lt;BR /&gt;FDR:0x28, div:640, ga:0x4, gb:0x2, a:10, b:64, speed:390625&lt;BR /&gt;Tr &amp;lt;= 112 ns&lt;BR /&gt;divider:625, est_div:640, DFSR:12&lt;BR /&gt;FDR:0x28, speed:390625&lt;BR /&gt;ready&lt;BR /&gt;initcall: eff12de4&lt;BR /&gt;DRAM: initcall: eff07464&lt;BR /&gt; DDR: initcall: eff13014&lt;BR /&gt;Monitor len: 00091968&lt;BR /&gt;Ram size: 40000000&lt;BR /&gt;Ram top: 40000000&lt;BR /&gt;Reserving MP boot page to 3ff00000&lt;BR /&gt;initcall: eff129b4&lt;BR /&gt;initcall: eff129d8&lt;BR /&gt;initcall: eff12f04&lt;BR /&gt;initcall: eff12be8&lt;BR /&gt;Reserving 582k for U-Boot at: 3fe6e000&lt;BR /&gt;initcall: eff12b9c&lt;BR /&gt;Reserving 1032k for malloc() at: 3fd6c000&lt;BR /&gt;initcall: eff12d70&lt;BR /&gt;Reserving 84 Bytes for Board Info at: 3fd6bfac&lt;BR /&gt;initcall: eff12f1c&lt;BR /&gt;initcall: eff12b4c&lt;BR /&gt;Reserving 172 Bytes for Global Data at: 3fd6bf00&lt;BR /&gt;initcall: eff12acc&lt;BR /&gt;initcall: eff12f34&lt;BR /&gt;initcall: eff12f94&lt;BR /&gt;initcall: eff130c4&lt;BR /&gt;initcall: eff12960&lt;BR /&gt;initcall: eff12fac&lt;BR /&gt;1 GiB (DDR2, 64-bit, CL=4, ECC off)&lt;BR /&gt;initcall: eff129f0&lt;BR /&gt;initcall: eff12a24&lt;BR /&gt;initcall: eff12a94&lt;BR /&gt;New Stack Pointer is: 3fd6bef0&lt;BR /&gt;initcall: eff12d0c&lt;BR /&gt;initcall: eff12f4c&lt;BR /&gt;initcall: eff12c8c&lt;BR /&gt;Relocation Offset is: 4ff6e000&lt;BR /&gt;Relocating to 3fe6e000, new gd at 3fd6bf00, sp at 3fd6bef0&lt;BR /&gt;initcall: eff12a50&lt;BR /&gt;initcall: 3fe81158&lt;BR /&gt;initcall: 3fe81170&lt;BR /&gt;initcall: eff135bc (relocated to 3fe815bc)&lt;BR /&gt;initcall: eff13194 (relocated to 3fe81194)&lt;BR /&gt;initcall: eff13454 (relocated to 3fe81454)&lt;BR /&gt;using memory 0x3fd6c000-0x3fe6e000 for malloc()&lt;BR /&gt;initcall: eff13420 (relocated to 3fe81420)&lt;BR /&gt;initcall: eff134b0 (relocated to 3fe814b0)&lt;BR /&gt;initcall: eff13140 (relocated to 3fe81140)&lt;BR /&gt;initcall: eff1cdb4 (relocated to 3fe8adb4)&lt;BR /&gt;initcall: eff133f0 (relocated to 3fe813f0)&lt;BR /&gt;initcall: eff13354 (relocated to 3fe81354)&lt;BR /&gt;Now running in RAM - U-Boot at: 3fe6e000&lt;BR /&gt;initcall: eff133bc (relocated to 3fe813bc)&lt;BR /&gt;initcall: eff1338c (relocated to 3fe8138c)&lt;BR /&gt;initcall: eff134c8 (relocated to 3fe814c8)&lt;BR /&gt;initcall: eff134f8 (relocated to 3fe814f8)&lt;BR /&gt;Flash: flash detect cfi&lt;BR /&gt;fwc addr ec000000 cmd f0 f0 8bit x 8 bit&lt;BR /&gt;fwc addr ec000000 cmd ff ff 8bit x 8 bit&lt;BR /&gt;fwc addr ec000055 cmd 98 98 8bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000010 is= ff 51&lt;BR /&gt;fwc addr ec000555 cmd 98 98 8bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000010 is= ff 51&lt;BR /&gt;fwc addr ec000000 cmd f0 f0f0 16bit x 8 bit&lt;BR /&gt;fwc addr ec000000 cmd ff ffff 16bit x 8 bit&lt;BR /&gt;fwc addr ec0000aa cmd 98 9898 16bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000020 is= ffff 5151&lt;BR /&gt;fwc addr ec000aaa cmd 98 9898 16bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000020 is= ffff 5151&lt;BR /&gt;fwc addr ec000000 cmd f0 00f0 16bit x 16 bit&lt;BR /&gt;fwc addr ec000000 cmd ff 00ff 16bit x 16 bit&lt;BR /&gt;fwc addr ec0000aa cmd 98 0098 16bit x 16 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000020 is= ffff 0051&lt;BR /&gt;fwc addr ec000aaa cmd 98 0098 16bit x 16 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000020 is= ffff 0051&lt;BR /&gt;fwc addr ec000000 cmd f0 f0f0f0f0 32bit x 8 bit&lt;BR /&gt;fwc addr ec000000 cmd ff ffffffff 32bit x 8 bit&lt;BR /&gt;fwc addr ec000154 cmd 98 98989898 32bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000040 is= 00510051 51515151&lt;BR /&gt;fwc addr ec001554 cmd 98 98989898 32bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000040 is= 00510051 51515151&lt;BR /&gt;fwc addr ec000000 cmd f0 00f000f0 32bit x 16 bit&lt;BR /&gt;fwc addr ec000000 cmd ff 00ff00ff 32bit x 16 bit&lt;BR /&gt;fwc addr ec000154 cmd 98 00980098 32bit x 16 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000040 is= 00510051 00510051&lt;BR /&gt;is= cmd 52(R) addr ec000044 is= 00520052 00520052&lt;BR /&gt;is= cmd 59(Y) addr ec000048 is= 00590059 00590059&lt;BR /&gt;device interface is 1&lt;BR /&gt;found port 4 chip 2 port 32 bits chip 16 bits&lt;BR /&gt;00 : 51 52 59 02 00 40 00 00 00 00 00 27 36 00 00 08 QRY..@.....'6...&lt;BR /&gt;10 : 09 08 13 01 02 03 03 1c 01 00 09 00 01 ff 07 00 ................&lt;BR /&gt;20 : 02 00 00 00 00 00 00 00 00 00 00 00 00 ff cd cf ................&lt;BR /&gt;fwc addr ec000000 cmd f0 00f000f0 32bit x 16 bit&lt;BR /&gt;fwc addr ec001554 cmd aa 00aa00aa 32bit x 16 bit&lt;BR /&gt;fwc addr ec000aa8 cmd 55 00550055 32bit x 16 bit&lt;BR /&gt;fwc addr ec001554 cmd 90 00900090 32bit x 16 bit&lt;BR /&gt;fwc addr ec000000 cmd f0 00f000f0 32bit x 16 bit&lt;BR /&gt;fwc addr ec000154 cmd 98 00980098 32bit x 16 bit&lt;BR /&gt;manufacturer is 2&lt;BR /&gt;manufacturer id is 0x1&lt;BR /&gt;device id is 0x227e&lt;BR /&gt;device id2 is 0x4801&lt;BR /&gt;cfi version is 0x3135&lt;BR /&gt;size_ratio 2 port 32 bits chip 16 bits&lt;BR /&gt;found 1 erase regions&lt;BR /&gt;erase region 0: 0x020007ff&lt;BR /&gt;erase_region_count = 2048 erase_region_size = 131072&lt;BR /&gt;ERROR: too many flash sectors&lt;BR /&gt;fwc addr ec000000 cmd f0 00f000f0 32bit x 16 bit&lt;BR /&gt;512 MiB&lt;BR /&gt;initcall: eff055dc (relocated to 3fe735dc)&lt;BR /&gt;PORDEVSR[IO_SEL_SRDS] = 5&lt;BR /&gt;SRIO1: enabled&lt;BR /&gt;initcall: eff13498 (relocated to 3fe81498)&lt;BR /&gt;initcall: eff1330c (relocated to 3fe8130c)&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;Destroy Hash Table: 3fed8270 table = 00000000&lt;BR /&gt;Create Hash Table: N=240&lt;/P&gt;&lt;P&gt;------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;uboot starts and stops at the above location。&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I traced the uboot code and found that the stop location was initr_env-&amp;gt; env_relocate-&amp;gt; set_default_env ("! Bad CRC")-&amp;gt; himport_r-&amp;gt; hsearch_r. As soon as the function hsearch_r was executed, it stopped.&lt;/P&gt;&lt;P&gt;I don't know why this kind of problem occurs, does anyone know how this is caused?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks！&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 09 Mar 2020 04:40:13 GMT</pubDate>
    <dc:creator>riverjeep</dc:creator>
    <dc:date>2020-03-09T04:40:13Z</dc:date>
    <item>
      <title>Why does initr_env fail to initialize when uboot starts</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Why-does-initr-env-fail-to-initialize-when-uboot-starts/m-p/1004496#M3115</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;MPC8640 uboot boot print information is as follows：&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;initcall: eff45d50&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;U-Boot 2017.11 (Mar 05 2020 - 22:42:06 +0800)&lt;/P&gt;&lt;P&gt;initcall: eff12c4c&lt;BR /&gt;U-Boot code: EFF00000 -&amp;gt; EFF6AB00 BSS: -&amp;gt; EFF91968&lt;BR /&gt;initcall: eff05268&lt;BR /&gt;CPU: 8641, Version: 3.0, (0x80900030)&lt;BR /&gt;Core: e600 Core 0 (MSSCR0=8000, PORDEVSR=aa58700), Version: 2.2, (0x80040202)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt; CPU:1000 MHz, MPX:500 MHz&lt;BR /&gt; DDR:250 MHz (500 MT/s data rate), LBC:500 MHz&lt;BR /&gt;L1: D-cache 32 KiB enabled&lt;BR /&gt; I-cache 32 KiB enabled&lt;BR /&gt;L2: 512 KiB enabled&lt;BR /&gt;initcall: eff13644&lt;BR /&gt;initcall: eff12e18&lt;BR /&gt;I2C: Requested speed:400000, i2c_clk:250000000&lt;BR /&gt;FDR:0x28, div:640, ga:0x4, gb:0x2, a:10, b:64, speed:390625&lt;BR /&gt;Tr &amp;lt;= 112 ns&lt;BR /&gt;divider:625, est_div:640, DFSR:12&lt;BR /&gt;FDR:0x28, speed:390625&lt;BR /&gt;ready&lt;BR /&gt;initcall: eff12de4&lt;BR /&gt;DRAM: initcall: eff07464&lt;BR /&gt; DDR: initcall: eff13014&lt;BR /&gt;Monitor len: 00091968&lt;BR /&gt;Ram size: 40000000&lt;BR /&gt;Ram top: 40000000&lt;BR /&gt;Reserving MP boot page to 3ff00000&lt;BR /&gt;initcall: eff129b4&lt;BR /&gt;initcall: eff129d8&lt;BR /&gt;initcall: eff12f04&lt;BR /&gt;initcall: eff12be8&lt;BR /&gt;Reserving 582k for U-Boot at: 3fe6e000&lt;BR /&gt;initcall: eff12b9c&lt;BR /&gt;Reserving 1032k for malloc() at: 3fd6c000&lt;BR /&gt;initcall: eff12d70&lt;BR /&gt;Reserving 84 Bytes for Board Info at: 3fd6bfac&lt;BR /&gt;initcall: eff12f1c&lt;BR /&gt;initcall: eff12b4c&lt;BR /&gt;Reserving 172 Bytes for Global Data at: 3fd6bf00&lt;BR /&gt;initcall: eff12acc&lt;BR /&gt;initcall: eff12f34&lt;BR /&gt;initcall: eff12f94&lt;BR /&gt;initcall: eff130c4&lt;BR /&gt;initcall: eff12960&lt;BR /&gt;initcall: eff12fac&lt;BR /&gt;1 GiB (DDR2, 64-bit, CL=4, ECC off)&lt;BR /&gt;initcall: eff129f0&lt;BR /&gt;initcall: eff12a24&lt;BR /&gt;initcall: eff12a94&lt;BR /&gt;New Stack Pointer is: 3fd6bef0&lt;BR /&gt;initcall: eff12d0c&lt;BR /&gt;initcall: eff12f4c&lt;BR /&gt;initcall: eff12c8c&lt;BR /&gt;Relocation Offset is: 4ff6e000&lt;BR /&gt;Relocating to 3fe6e000, new gd at 3fd6bf00, sp at 3fd6bef0&lt;BR /&gt;initcall: eff12a50&lt;BR /&gt;initcall: 3fe81158&lt;BR /&gt;initcall: 3fe81170&lt;BR /&gt;initcall: eff135bc (relocated to 3fe815bc)&lt;BR /&gt;initcall: eff13194 (relocated to 3fe81194)&lt;BR /&gt;initcall: eff13454 (relocated to 3fe81454)&lt;BR /&gt;using memory 0x3fd6c000-0x3fe6e000 for malloc()&lt;BR /&gt;initcall: eff13420 (relocated to 3fe81420)&lt;BR /&gt;initcall: eff134b0 (relocated to 3fe814b0)&lt;BR /&gt;initcall: eff13140 (relocated to 3fe81140)&lt;BR /&gt;initcall: eff1cdb4 (relocated to 3fe8adb4)&lt;BR /&gt;initcall: eff133f0 (relocated to 3fe813f0)&lt;BR /&gt;initcall: eff13354 (relocated to 3fe81354)&lt;BR /&gt;Now running in RAM - U-Boot at: 3fe6e000&lt;BR /&gt;initcall: eff133bc (relocated to 3fe813bc)&lt;BR /&gt;initcall: eff1338c (relocated to 3fe8138c)&lt;BR /&gt;initcall: eff134c8 (relocated to 3fe814c8)&lt;BR /&gt;initcall: eff134f8 (relocated to 3fe814f8)&lt;BR /&gt;Flash: flash detect cfi&lt;BR /&gt;fwc addr ec000000 cmd f0 f0 8bit x 8 bit&lt;BR /&gt;fwc addr ec000000 cmd ff ff 8bit x 8 bit&lt;BR /&gt;fwc addr ec000055 cmd 98 98 8bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000010 is= ff 51&lt;BR /&gt;fwc addr ec000555 cmd 98 98 8bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000010 is= ff 51&lt;BR /&gt;fwc addr ec000000 cmd f0 f0f0 16bit x 8 bit&lt;BR /&gt;fwc addr ec000000 cmd ff ffff 16bit x 8 bit&lt;BR /&gt;fwc addr ec0000aa cmd 98 9898 16bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000020 is= ffff 5151&lt;BR /&gt;fwc addr ec000aaa cmd 98 9898 16bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000020 is= ffff 5151&lt;BR /&gt;fwc addr ec000000 cmd f0 00f0 16bit x 16 bit&lt;BR /&gt;fwc addr ec000000 cmd ff 00ff 16bit x 16 bit&lt;BR /&gt;fwc addr ec0000aa cmd 98 0098 16bit x 16 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000020 is= ffff 0051&lt;BR /&gt;fwc addr ec000aaa cmd 98 0098 16bit x 16 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000020 is= ffff 0051&lt;BR /&gt;fwc addr ec000000 cmd f0 f0f0f0f0 32bit x 8 bit&lt;BR /&gt;fwc addr ec000000 cmd ff ffffffff 32bit x 8 bit&lt;BR /&gt;fwc addr ec000154 cmd 98 98989898 32bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000040 is= 00510051 51515151&lt;BR /&gt;fwc addr ec001554 cmd 98 98989898 32bit x 8 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000040 is= 00510051 51515151&lt;BR /&gt;fwc addr ec000000 cmd f0 00f000f0 32bit x 16 bit&lt;BR /&gt;fwc addr ec000000 cmd ff 00ff00ff 32bit x 16 bit&lt;BR /&gt;fwc addr ec000154 cmd 98 00980098 32bit x 16 bit&lt;BR /&gt;is= cmd 51(Q) addr ec000040 is= 00510051 00510051&lt;BR /&gt;is= cmd 52(R) addr ec000044 is= 00520052 00520052&lt;BR /&gt;is= cmd 59(Y) addr ec000048 is= 00590059 00590059&lt;BR /&gt;device interface is 1&lt;BR /&gt;found port 4 chip 2 port 32 bits chip 16 bits&lt;BR /&gt;00 : 51 52 59 02 00 40 00 00 00 00 00 27 36 00 00 08 QRY..@.....'6...&lt;BR /&gt;10 : 09 08 13 01 02 03 03 1c 01 00 09 00 01 ff 07 00 ................&lt;BR /&gt;20 : 02 00 00 00 00 00 00 00 00 00 00 00 00 ff cd cf ................&lt;BR /&gt;fwc addr ec000000 cmd f0 00f000f0 32bit x 16 bit&lt;BR /&gt;fwc addr ec001554 cmd aa 00aa00aa 32bit x 16 bit&lt;BR /&gt;fwc addr ec000aa8 cmd 55 00550055 32bit x 16 bit&lt;BR /&gt;fwc addr ec001554 cmd 90 00900090 32bit x 16 bit&lt;BR /&gt;fwc addr ec000000 cmd f0 00f000f0 32bit x 16 bit&lt;BR /&gt;fwc addr ec000154 cmd 98 00980098 32bit x 16 bit&lt;BR /&gt;manufacturer is 2&lt;BR /&gt;manufacturer id is 0x1&lt;BR /&gt;device id is 0x227e&lt;BR /&gt;device id2 is 0x4801&lt;BR /&gt;cfi version is 0x3135&lt;BR /&gt;size_ratio 2 port 32 bits chip 16 bits&lt;BR /&gt;found 1 erase regions&lt;BR /&gt;erase region 0: 0x020007ff&lt;BR /&gt;erase_region_count = 2048 erase_region_size = 131072&lt;BR /&gt;ERROR: too many flash sectors&lt;BR /&gt;fwc addr ec000000 cmd f0 00f000f0 32bit x 16 bit&lt;BR /&gt;512 MiB&lt;BR /&gt;initcall: eff055dc (relocated to 3fe735dc)&lt;BR /&gt;PORDEVSR[IO_SEL_SRDS] = 5&lt;BR /&gt;SRIO1: enabled&lt;BR /&gt;initcall: eff13498 (relocated to 3fe81498)&lt;BR /&gt;initcall: eff1330c (relocated to 3fe8130c)&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;Destroy Hash Table: 3fed8270 table = 00000000&lt;BR /&gt;Create Hash Table: N=240&lt;/P&gt;&lt;P&gt;------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;uboot starts and stops at the above location。&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I traced the uboot code and found that the stop location was initr_env-&amp;gt; env_relocate-&amp;gt; set_default_env ("! Bad CRC")-&amp;gt; himport_r-&amp;gt; hsearch_r. As soon as the function hsearch_r was executed, it stopped.&lt;/P&gt;&lt;P&gt;I don't know why this kind of problem occurs, does anyone know how this is caused?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks！&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Mar 2020 04:40:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Why-does-initr-env-fail-to-initialize-when-uboot-starts/m-p/1004496#M3115</guid>
      <dc:creator>riverjeep</dc:creator>
      <dc:date>2020-03-09T04:40:13Z</dc:date>
    </item>
    <item>
      <title>Re: Why does initr_env fail to initialize when uboot starts</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Why-does-initr-env-fail-to-initialize-when-uboot-starts/m-p/1004497#M3116</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&amp;nbsp;&lt;A _jive_internal="true" class="" data-content-finding="Community" data-userid="314251" data-username="riverjeep" href="https://community.nxp.com/people/riverjeep" style="color: #3d9ce7; background-color: #ffffff; border: 0px; font-weight: 600; text-decoration: none; font-size: 11.9994px;"&gt;river jeep&lt;/A&gt;,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Would you please provide the memory map of u-boot and u-boot environment?&lt;/P&gt;&lt;P&gt;Please check whether u-boot environment is override by u-boot binary.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yiping&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Mar 2020 09:47:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Why-does-initr-env-fail-to-initialize-when-uboot-starts/m-p/1004497#M3116</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2020-03-11T09:47:04Z</dc:date>
    </item>
    <item>
      <title>Re: Why does initr_env fail to initialize when uboot starts</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Why-does-initr-env-fail-to-initialize-when-uboot-starts/m-p/1004498#M3117</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have solved the problem.&lt;BR /&gt;The method is: in the himport_r () function, where hsearch_r () is called, replace hsearch_r () with my_hsearch_r (). my_hsearch_r () function prototype is&lt;BR /&gt;int my_hsearch_r (char * name, char * value, ACTION action, ENTRY ** retval, struct hsearch_data * htab, int flag), replace the "ENTRY item" with "char * name, char * value" parameters. The internal implementation of my_hsearch_r () refers exactly to hsearch_r (). I suspect it is a stack overflow problem. As for why the stack overflow occurs, I don't know the exact reason. I wonder if it will be related to the configuration in MPC8641HPCN.h&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Mar 2020 11:58:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Why-does-initr-env-fail-to-initialize-when-uboot-starts/m-p/1004498#M3117</guid>
      <dc:creator>riverjeep</dc:creator>
      <dc:date>2020-03-11T11:58:01Z</dc:date>
    </item>
    <item>
      <title>Re: Why does initr_env fail to initialize when uboot starts</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/Why-does-initr-env-fail-to-initialize-when-uboot-starts/m-p/1004499#M3118</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The configuration of DDR in uboot is as follows：&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Mar 2020 15:26:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/Why-does-initr-env-fail-to-initialize-when-uboot-starts/m-p/1004499#M3118</guid>
      <dc:creator>riverjeep</dc:creator>
      <dc:date>2020-03-11T15:26:27Z</dc:date>
    </item>
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