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    <title>topic Re: PCIe reset for T1042  in PowerQUICC Processors</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-reset-for-T1042/m-p/909588#M2845</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You seem to mix up different reset terms. The only way to reset PCI Express interface of the processor is to reset the processor using PORESET or HRESET.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;T1040 Reference Design Board&lt;/STRONG&gt; (T1040RDB, T1042RDB) contains three PCIe connectors, two Mini PCIe and one PCIe x1 slot. The board has a feature allowing to assert reset signals going to each of these connectors, this is realised via on-board CPLD. RSTCON2 register located in the CPLD controls those reset signals, so the user is able to assert reset individually for each slot in software. You have to understand that the CPLD is an external device to the T1040/T1042, not the part of the processor. That is why it is not described in the &lt;STRONG&gt;QorIQ T1040 Reference Manual&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Bulat&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 12 Sep 2019 12:00:16 GMT</pubDate>
    <dc:creator>Bulat</dc:creator>
    <dc:date>2019-09-12T12:00:16Z</dc:date>
    <item>
      <title>PCIe reset for T1042</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-reset-for-T1042/m-p/909586#M2843</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am referring &lt;STRONG&gt;QorIQ T1040 Reference Manual&lt;/STRONG&gt;&amp;nbsp; for my board &lt;STRONG&gt;T1042&lt;/STRONG&gt; where I want to reset the only pcie . But I could not able to find out how to reset the pcie .&lt;/P&gt;&lt;P&gt;Then I referred&amp;nbsp;&lt;STRONG&gt;QorIQ T1040 Reference Design Board User Guide&amp;nbsp;&lt;/STRONG&gt;where I found out CPLD under that RSTCON2 register from which I can reset the PCIe&amp;nbsp;&lt;/P&gt;&lt;P&gt;After memory mapping for the for RSTCON2 register on my vxworks platform I tried to write 1 to clear for resetting the PCIe , but not sure whether it got reset or not .&amp;nbsp;&lt;/P&gt;&lt;P&gt;When I read default value RSTCON2 it was 0xFF ,but after writing also on pcie bit&amp;nbsp; its still 0xFF . (no change)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have few question related to my comments&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. How can I know CPLD is present on my target board T1042 since in refernce manual I could not find out anything related to that.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.Is there any other way I can reset only pcie interface .&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Sep 2019 04:24:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-reset-for-T1042/m-p/909586#M2843</guid>
      <dc:creator>utkarsh_100</dc:creator>
      <dc:date>2019-09-11T04:24:20Z</dc:date>
    </item>
    <item>
      <title>Re: PCIe reset for T1042</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-reset-for-T1042/m-p/909587#M2844</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;utkarsh_100 wrote:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Hi All&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;I am referring &lt;STRONG&gt;QorIQ T1040 Reference Manual&lt;/STRONG&gt;&amp;nbsp; for my board &lt;STRONG&gt;T1042&lt;/STRONG&gt; where I want to reset the only pcie . But I could not able to find out how to reset the pcie .&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Then I referred&amp;nbsp;&lt;STRONG&gt;QorIQ T1040 Reference Design Board User Guide&amp;nbsp;&lt;/STRONG&gt;where I found out CPLD under that RSTCON2 register from which I can reset the PCIe&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;After memory mapping for the for RSTCON2&amp;nbsp;&lt;A href="https://freejobalert.vip/" style="color: #000000;"&gt;freejobalert&lt;/A&gt; &lt;A href="https://gimp.software/" style="color: #000000;"&gt;gimp&lt;/A&gt; &lt;A href="https://notepad.software/" style="color: #000000;"&gt;notepad++&lt;/A&gt;&amp;nbsp;register on my vxworks platform I tried to write 1 to clear for resetting the PCIe , but not sure whether it got reset or not .&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;When I read default value RSTCON2 it was 0xFF ,but after writing also on pcie bit&amp;nbsp; its still 0xFF . (no change)&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;I have few question related to my comments&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;1. How can I know CPLD is present on my target board T1042 since in refernce manual I could not find out anything related to that.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;2.Is there any other way I can reset only pcie interface .&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Thanks in advance&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;I also have similar questions. Help is appreciated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Thanks in advance.&lt;BR /&gt;Regards&lt;/P&gt;&lt;P&gt;Shane&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Sep 2019 18:15:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-reset-for-T1042/m-p/909587#M2844</guid>
      <dc:creator>shaneggpierce</dc:creator>
      <dc:date>2019-09-11T18:15:39Z</dc:date>
    </item>
    <item>
      <title>Re: PCIe reset for T1042</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-reset-for-T1042/m-p/909588#M2845</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You seem to mix up different reset terms. The only way to reset PCI Express interface of the processor is to reset the processor using PORESET or HRESET.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;T1040 Reference Design Board&lt;/STRONG&gt; (T1040RDB, T1042RDB) contains three PCIe connectors, two Mini PCIe and one PCIe x1 slot. The board has a feature allowing to assert reset signals going to each of these connectors, this is realised via on-board CPLD. RSTCON2 register located in the CPLD controls those reset signals, so the user is able to assert reset individually for each slot in software. You have to understand that the CPLD is an external device to the T1040/T1042, not the part of the processor. That is why it is not described in the &lt;STRONG&gt;QorIQ T1040 Reference Manual&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Bulat&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Sep 2019 12:00:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/PCIe-reset-for-T1042/m-p/909588#M2845</guid>
      <dc:creator>Bulat</dc:creator>
      <dc:date>2019-09-12T12:00:16Z</dc:date>
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