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    <title>PowerQUICC Processors中的主题 Re: TWR-P1025 board Memory Mapping structures?</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/TWR-P1025-board-Memory-Mapping-structures/m-p/870830#M2706</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;P1025 processor memory map is flexible and can be programmed. If you run your processor under debugger control, than memory map is programmed by debugger' target initialization file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For more information please look P1025 Reference Manual, Chapter 2 "Memory map".&lt;/P&gt;&lt;P&gt;P1025 Reference Manual is available for download from P1025 Product Page, "Documentation" tab:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/power-architecture-processors/qoriq-platforms/p-series/qoriq-p1025-16-single-and-dual-core-multi-protocol-communications-processors:P1025?tab=Documentation_Tab"&gt;https://www.nxp.com/products/processors-and-microcontrollers/power-architecture-processors/qoriq-platforms/p-series/qoriq-p1025-16-single-and-dual-core-multi-protocol-communications-processors:P1025?tab=Documentation_Tab&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 18 Feb 2019 17:04:35 GMT</pubDate>
    <dc:creator>alexander_yakov</dc:creator>
    <dc:date>2019-02-18T17:04:35Z</dc:date>
    <item>
      <title>TWR-P1025 board Memory Mapping structures?</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/TWR-P1025-board-Memory-Mapping-structures/m-p/870829#M2705</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am trying to program Freescale Twr_p1025 board with the help of MULTI IDE. I am looking for the memory mapping structures of all the memory locations of the p1025 board. I went through the manuals but I do not see any helpful information. It would be great help if anyone can help me with the memory mapping and locations of the TWR_p1025 board. As I am trying to load the code in different memory locations?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Feb 2019 11:59:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/TWR-P1025-board-Memory-Mapping-structures/m-p/870829#M2705</guid>
      <dc:creator>srihrsh29</dc:creator>
      <dc:date>2019-02-18T11:59:38Z</dc:date>
    </item>
    <item>
      <title>Re: TWR-P1025 board Memory Mapping structures?</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/TWR-P1025-board-Memory-Mapping-structures/m-p/870830#M2706</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;P1025 processor memory map is flexible and can be programmed. If you run your processor under debugger control, than memory map is programmed by debugger' target initialization file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For more information please look P1025 Reference Manual, Chapter 2 "Memory map".&lt;/P&gt;&lt;P&gt;P1025 Reference Manual is available for download from P1025 Product Page, "Documentation" tab:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/power-architecture-processors/qoriq-platforms/p-series/qoriq-p1025-16-single-and-dual-core-multi-protocol-communications-processors:P1025?tab=Documentation_Tab"&gt;https://www.nxp.com/products/processors-and-microcontrollers/power-architecture-processors/qoriq-platforms/p-series/qoriq-p1025-16-single-and-dual-core-multi-protocol-communications-processors:P1025?tab=Documentation_Tab&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Feb 2019 17:04:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/TWR-P1025-board-Memory-Mapping-structures/m-p/870830#M2706</guid>
      <dc:creator>alexander_yakov</dc:creator>
      <dc:date>2019-02-18T17:04:35Z</dc:date>
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