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    <title>PowerQUICC Processors中的主题 MPC8548 Uboot InstructionTLBError</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8548-Uboot-InstructionTLBError/m-p/747744#M2328</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I working on Uboot for the MPC8548,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-I built the Uboot with&lt;STRONG&gt; ppc_85xx-&amp;nbsp;&lt;/STRONG&gt;toolchain,&lt;BR /&gt;-The Entry Point Address of elf file is&amp;nbsp;&lt;STRONG&gt;0xfffa0000&lt;/STRONG&gt;,&lt;BR /&gt;- My Memory map is ;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x0000_0000 | 256MB | 0x0FFF_FFFF | DDR SDRAM&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x5000_0000 | 64MB | 0x53FF_FFFF | PCI 1 Prefetchable Memory&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x5400_0000 | 64MB | 0x57FF_FFFF | PCI 1 Non-Prefetchable Memory&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x5800_0000 | 64MB | 0x5BFF_FFFF | PCI 1 IO&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x6000_0000 | 64MB | 0x63FF_FFFF | PCI Express Prefetchable Memory&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x6400_0000 | 64MB | 0x67FF_FFFF | PCI Express Non-Prefetchable Memory&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x6800_0000 | 64MB | 0x6BFF_FFFF | PCI Express IO&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xF8B0_0000 | 16MB | 0xF7FF_FFFF | NVRAM/CADMUS&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xF000_0000 | 64MB | 0xFBFF_FFFF | LBC SDRAM&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xE000_0000 | 1MB | 0xFE0F_FFFF | Configuration Control Registers&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xD000_0000 | 64MB | 0xD3FF_FFFF | SODIMM Flash&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xFF80_0000 | 8MB | 0xFFFF_FFFF | Boot Flash&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After the install program to board, program stay at 0xfffff290 address, I did comparison with elf file, its&amp;nbsp;InstructionTLBError.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How can I fix this, I need suggestions.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I look forward to your replies.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Your Sincerely.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 29 Mar 2018 07:47:06 GMT</pubDate>
    <dc:creator>systick</dc:creator>
    <dc:date>2018-03-29T07:47:06Z</dc:date>
    <item>
      <title>MPC8548 Uboot InstructionTLBError</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8548-Uboot-InstructionTLBError/m-p/747744#M2328</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I working on Uboot for the MPC8548,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-I built the Uboot with&lt;STRONG&gt; ppc_85xx-&amp;nbsp;&lt;/STRONG&gt;toolchain,&lt;BR /&gt;-The Entry Point Address of elf file is&amp;nbsp;&lt;STRONG&gt;0xfffa0000&lt;/STRONG&gt;,&lt;BR /&gt;- My Memory map is ;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x0000_0000 | 256MB | 0x0FFF_FFFF | DDR SDRAM&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x5000_0000 | 64MB | 0x53FF_FFFF | PCI 1 Prefetchable Memory&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x5400_0000 | 64MB | 0x57FF_FFFF | PCI 1 Non-Prefetchable Memory&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x5800_0000 | 64MB | 0x5BFF_FFFF | PCI 1 IO&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x6000_0000 | 64MB | 0x63FF_FFFF | PCI Express Prefetchable Memory&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x6400_0000 | 64MB | 0x67FF_FFFF | PCI Express Non-Prefetchable Memory&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0x6800_0000 | 64MB | 0x6BFF_FFFF | PCI Express IO&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xF8B0_0000 | 16MB | 0xF7FF_FFFF | NVRAM/CADMUS&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xF000_0000 | 64MB | 0xFBFF_FFFF | LBC SDRAM&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xE000_0000 | 1MB | 0xFE0F_FFFF | Configuration Control Registers&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xD000_0000 | 64MB | 0xD3FF_FFFF | SODIMM Flash&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;0xFF80_0000 | 8MB | 0xFFFF_FFFF | Boot Flash&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After the install program to board, program stay at 0xfffff290 address, I did comparison with elf file, its&amp;nbsp;InstructionTLBError.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How can I fix this, I need suggestions.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I look forward to your replies.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Your Sincerely.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Mar 2018 07:47:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8548-Uboot-InstructionTLBError/m-p/747744#M2328</guid>
      <dc:creator>systick</dc:creator>
      <dc:date>2018-03-29T07:47:06Z</dc:date>
    </item>
    <item>
      <title>Re: MPC8548 Uboot InstructionTLBError</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8548-Uboot-InstructionTLBError/m-p/747745#M2329</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Instruction TLB error means - "Virtual addresses associated with an instruction fetch do not match any valid TLB entry."&lt;/P&gt;&lt;P&gt;That is - an attempt to fetch some instruction from some address caused this error, because this particular address is not configured in TLB. Typically this means either TLB configuration issue or attempt to execute code from some invalid location.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When TLB error interrupt is taken, register SRR0 is set to the effective address of the instruction causing the instruction TLB error interrupt.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For more details please look e500 Core Reference Manual, Section 5.7.13 "Instruction TLB Error Interrupt"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is a direct link to this document:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf"&gt;https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Alexander&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Apr 2018 06:45:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8548-Uboot-InstructionTLBError/m-p/747745#M2329</guid>
      <dc:creator>alexander_yakov</dc:creator>
      <dc:date>2018-04-03T06:45:42Z</dc:date>
    </item>
    <item>
      <title>Re: MPC8548 Uboot InstructionTLBError</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8548-Uboot-InstructionTLBError/m-p/747746#M2330</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mr.Yakovlev,&lt;/P&gt;&lt;P&gt;Thanks for the reply, I will focus on SRRx registers.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Apr 2018 05:24:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8548-Uboot-InstructionTLBError/m-p/747746#M2330</guid>
      <dc:creator>systick</dc:creator>
      <dc:date>2018-04-05T05:24:28Z</dc:date>
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