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    <title>topic MPC8572E BringUp Guide in PowerQUICC Processors</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8572E-BringUp-Guide/m-p/679591#M2117</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello all,&lt;/P&gt;&lt;P&gt;We have a design with&amp;nbsp; the processor MPC8572E and have some problems with the low temperature tests(-40 celsius).&lt;/P&gt;&lt;P&gt;While digging the documents(errata mainly) we found that in the bring up guide(AN3647, Rev2) in section 1.7 table 1, we cannot see the our chip's device marking.&lt;/P&gt;&lt;P&gt;We two different chips that have the following device markings:&lt;/P&gt;&lt;P&gt;04M20X and 44M20X&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you have a new version of this bring up guide or which revision of the MPC8572E have these device markings ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Edit:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the chip errata(MPC8572ECE Rev.N, 06/12) at page 39 it says:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A-004508: DDR controller may not function across the full industrial temperature range&lt;/P&gt;&lt;P&gt;Affects: DDR&lt;/P&gt;&lt;P&gt;Decription: When the DDR controller is initialized below 0 C and operated beyond am ambient tempature of 60 C, the DDR controller may not function properly.&lt;/P&gt;&lt;P&gt;Impact: Data corruption may be observed during reads from DRAM.&lt;/P&gt;&lt;P&gt;Workaround: When the DDR controller operates across the full supported industrial temperature range then software should set bit 22 at the CCSR register offset &lt;EM&gt;0x0_2F08 &lt;/EM&gt;before the DDR controller is enabled.&lt;/P&gt;&lt;P&gt;Fix Plan: No plans to fix.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This errata seems a way to fix the issue however in the family reference manual there is not such a register with the given offset. Anybody have an idea ?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 08 Jun 2017 06:23:29 GMT</pubDate>
    <dc:creator>alicankurutepe</dc:creator>
    <dc:date>2017-06-08T06:23:29Z</dc:date>
    <item>
      <title>MPC8572E BringUp Guide</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8572E-BringUp-Guide/m-p/679591#M2117</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello all,&lt;/P&gt;&lt;P&gt;We have a design with&amp;nbsp; the processor MPC8572E and have some problems with the low temperature tests(-40 celsius).&lt;/P&gt;&lt;P&gt;While digging the documents(errata mainly) we found that in the bring up guide(AN3647, Rev2) in section 1.7 table 1, we cannot see the our chip's device marking.&lt;/P&gt;&lt;P&gt;We two different chips that have the following device markings:&lt;/P&gt;&lt;P&gt;04M20X and 44M20X&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you have a new version of this bring up guide or which revision of the MPC8572E have these device markings ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Edit:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the chip errata(MPC8572ECE Rev.N, 06/12) at page 39 it says:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A-004508: DDR controller may not function across the full industrial temperature range&lt;/P&gt;&lt;P&gt;Affects: DDR&lt;/P&gt;&lt;P&gt;Decription: When the DDR controller is initialized below 0 C and operated beyond am ambient tempature of 60 C, the DDR controller may not function properly.&lt;/P&gt;&lt;P&gt;Impact: Data corruption may be observed during reads from DRAM.&lt;/P&gt;&lt;P&gt;Workaround: When the DDR controller operates across the full supported industrial temperature range then software should set bit 22 at the CCSR register offset &lt;EM&gt;0x0_2F08 &lt;/EM&gt;before the DDR controller is enabled.&lt;/P&gt;&lt;P&gt;Fix Plan: No plans to fix.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This errata seems a way to fix the issue however in the family reference manual there is not such a register with the given offset. Anybody have an idea ?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 08 Jun 2017 06:23:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8572E-BringUp-Guide/m-p/679591#M2117</guid>
      <dc:creator>alicankurutepe</dc:creator>
      <dc:date>2017-06-08T06:23:29Z</dc:date>
    </item>
    <item>
      <title>Re: MPC8572E BringUp Guide</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8572E-BringUp-Guide/m-p/679592#M2118</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Rev. 2 is the last revision of the MPC8572e bring-up guide. The last qual report&lt;BR /&gt; &lt;A href="https://www.google.ru/search?client=opera&amp;amp;q=16395_MPC8572_Qualification_Report_Rev_3_042214.pdf"&gt;https://www.google.ru/search?client=opera&amp;amp;q=16395_MPC8572_Qualification_Report_Rev_3_042214.pdf&lt;/A&gt;&lt;BR /&gt; mentions 04M20X for the MPC8572E rev. 2.2.1 You may check device part number instead of mask on the nxp site.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;This register exists; it is just is not published. Also there was PCN &lt;BR /&gt;&lt;A href="http://www.nxp.com/assets/documents/data/en/product-change-notices/PCN15248.htm"&gt;http://www.nxp.com/assets/documents/data/en/product-change-notices/PCN15248.htm&lt;/A&gt;&lt;BR /&gt; which says that customers need to implement the software workaround if their products need a DDR controller to operate&amp;nbsp;over the entire lower extended&amp;nbsp;temperature range.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 08 Jun 2017 13:21:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/MPC8572E-BringUp-Guide/m-p/679592#M2118</guid>
      <dc:creator>r8070z</dc:creator>
      <dc:date>2017-06-08T13:21:32Z</dc:date>
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