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    <title>topic PCI Express in PowerQUICC Processors</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/PCI-Express/m-p/661352#M2038</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;1. For PCI exp using&amp;nbsp;&lt;EM&gt;&lt;STRONG&gt;lynx_pciexp_tx_main&lt;/STRONG&gt;&lt;/EM&gt; Model, which amplitude will correspond to the model listed&lt;/P&gt;&lt;P&gt;Sets the peak value for output swing of transmitters and the amount of transmit equalization for lane A.&lt;/P&gt;&lt;P&gt;Transmit equalization selection bus for lane A.&lt;/P&gt;&lt;P&gt;If register field SRDSCR3[21:23] = 000, then the equalization definitions are:&lt;/P&gt;&lt;P&gt;000 No equalization&lt;/P&gt;&lt;P&gt;001 1.09x relative amplitude&lt;/P&gt;&lt;P&gt;010 1.2x relative amplitude&lt;/P&gt;&lt;P&gt;011 1.33x relative amplitude&lt;/P&gt;&lt;P&gt;100 1.5x relative amplitude&lt;/P&gt;&lt;P&gt;101 1.71x relative amplitude&lt;/P&gt;&lt;P&gt;110 2.0x relative amplitude&lt;/P&gt;&lt;P&gt;111 Reserved&lt;/P&gt;&lt;P&gt;If register field SRDSCR3[21:23] = 110, then the equalization definitions are:&lt;/P&gt;&lt;P&gt;000 No equalization&lt;/P&gt;&lt;P&gt;001 1.2x relative amplitude&lt;/P&gt;&lt;P&gt;010 1.5x relative amplitude&lt;/P&gt;&lt;P&gt;011 2.0x relative amplitude&lt;/P&gt;&lt;P&gt;100 Reserved&lt;/P&gt;&lt;P&gt;101 Reserved&lt;/P&gt;&lt;P&gt;110 Reserved&lt;/P&gt;&lt;P&gt;111 Reserved&lt;/P&gt;&lt;P&gt;Recommended setting per protocol:&lt;/P&gt;&lt;P&gt;• SATA: don’t care&lt;/P&gt;&lt;P&gt;• PCI Express: 100&lt;/P&gt;&lt;P&gt;• SGMII: 100&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. This is for PCI express, manual mentioned that AC coupling could be enable or disable, since AC caps places external to the chip at the driver, could disable the internal ones?&lt;/P&gt;&lt;P&gt;Used to set on-chip AC coupling in the receiver in lane A.&lt;/P&gt;&lt;P&gt;0 Disable on-chip AC coupling&lt;/P&gt;&lt;P&gt;1 Enable on-chip AC coupling&lt;/P&gt;&lt;P&gt;Recommended setting per protocol:&lt;/P&gt;&lt;P&gt;• SATA: 1&lt;/P&gt;&lt;P&gt;• PCI Express: 1&lt;/P&gt;&lt;P&gt;• SGMII: 1&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 29 Sep 2016 20:26:38 GMT</pubDate>
    <dc:creator>yosvaniledo</dc:creator>
    <dc:date>2016-09-29T20:26:38Z</dc:date>
    <item>
      <title>PCI Express</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/PCI-Express/m-p/661352#M2038</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;1. For PCI exp using&amp;nbsp;&lt;EM&gt;&lt;STRONG&gt;lynx_pciexp_tx_main&lt;/STRONG&gt;&lt;/EM&gt; Model, which amplitude will correspond to the model listed&lt;/P&gt;&lt;P&gt;Sets the peak value for output swing of transmitters and the amount of transmit equalization for lane A.&lt;/P&gt;&lt;P&gt;Transmit equalization selection bus for lane A.&lt;/P&gt;&lt;P&gt;If register field SRDSCR3[21:23] = 000, then the equalization definitions are:&lt;/P&gt;&lt;P&gt;000 No equalization&lt;/P&gt;&lt;P&gt;001 1.09x relative amplitude&lt;/P&gt;&lt;P&gt;010 1.2x relative amplitude&lt;/P&gt;&lt;P&gt;011 1.33x relative amplitude&lt;/P&gt;&lt;P&gt;100 1.5x relative amplitude&lt;/P&gt;&lt;P&gt;101 1.71x relative amplitude&lt;/P&gt;&lt;P&gt;110 2.0x relative amplitude&lt;/P&gt;&lt;P&gt;111 Reserved&lt;/P&gt;&lt;P&gt;If register field SRDSCR3[21:23] = 110, then the equalization definitions are:&lt;/P&gt;&lt;P&gt;000 No equalization&lt;/P&gt;&lt;P&gt;001 1.2x relative amplitude&lt;/P&gt;&lt;P&gt;010 1.5x relative amplitude&lt;/P&gt;&lt;P&gt;011 2.0x relative amplitude&lt;/P&gt;&lt;P&gt;100 Reserved&lt;/P&gt;&lt;P&gt;101 Reserved&lt;/P&gt;&lt;P&gt;110 Reserved&lt;/P&gt;&lt;P&gt;111 Reserved&lt;/P&gt;&lt;P&gt;Recommended setting per protocol:&lt;/P&gt;&lt;P&gt;• SATA: don’t care&lt;/P&gt;&lt;P&gt;• PCI Express: 100&lt;/P&gt;&lt;P&gt;• SGMII: 100&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. This is for PCI express, manual mentioned that AC coupling could be enable or disable, since AC caps places external to the chip at the driver, could disable the internal ones?&lt;/P&gt;&lt;P&gt;Used to set on-chip AC coupling in the receiver in lane A.&lt;/P&gt;&lt;P&gt;0 Disable on-chip AC coupling&lt;/P&gt;&lt;P&gt;1 Enable on-chip AC coupling&lt;/P&gt;&lt;P&gt;Recommended setting per protocol:&lt;/P&gt;&lt;P&gt;• SATA: 1&lt;/P&gt;&lt;P&gt;• PCI Express: 1&lt;/P&gt;&lt;P&gt;• SGMII: 1&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Sep 2016 20:26:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/PCI-Express/m-p/661352#M2038</guid>
      <dc:creator>yosvaniledo</dc:creator>
      <dc:date>2016-09-29T20:26:38Z</dc:date>
    </item>
    <item>
      <title>Re: PCI Express</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/PCI-Express/m-p/661353#M2039</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial;"&gt;MPC8378&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial;"&gt;1) By default 1.5x relative amplitude is selected for the PCI Express.&lt;BR /&gt;2) It is not recommended to disable internal AC-coupling even if external AC-coupling capacitors are present.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Oct 2016 07:40:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/PCI-Express/m-p/661353#M2039</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2016-10-12T07:40:17Z</dc:date>
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