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    <title>topic flexcan write failure in PowerQUICC Processors</title>
    <link>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630571#M1797</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I use flexcan interface to send multiple frame datas of mpc8309, has small frame data send failure, why? help me,tks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ps. TXF is 112 , but interrupt number and&amp;nbsp;&lt;SPAN&gt;TX packets is110.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[root@mpc8309som test]# cat /proc/net/can/stats&lt;/P&gt;&lt;P&gt;112 transmitted frames (TXF)&lt;BR /&gt; &lt;STRONG&gt;112 received frames (RXF)&lt;/STRONG&gt;&lt;BR /&gt; 112 matched frames (RXMF)&lt;/P&gt;&lt;P&gt;100 % total match ratio (RXMR)&lt;BR /&gt; 0 frames/s total tx rate (TXR)&lt;BR /&gt; 0 frames/s total rx rate (RXR)&lt;/P&gt;&lt;P&gt;100 % current match ratio (CRXMR)&lt;BR /&gt; 0 frames/s current tx rate (CTXR)&lt;BR /&gt; 0 frames/s current rx rate (CRXR)&lt;/P&gt;&lt;P&gt;100 % max match ratio (MRXMR)&lt;BR /&gt; 37 frames/s max tx rate (MTXR)&lt;BR /&gt; 37 frames/s max rx rate (MRXR)&lt;/P&gt;&lt;P&gt;0 current receive list entries (CRCV)&lt;BR /&gt; 1 maximum receive list entries (MRCV)&lt;/P&gt;&lt;P&gt;[root@mpc8309som test]# cat /proc/interrupts &lt;BR /&gt; CPU0 &lt;BR /&gt; 16: 582 IPIC Level serial&lt;BR /&gt; 17: 0 IPIC Level mpc8xxx_spi&lt;BR /&gt; 19: 300 QEIC Level UCC Geth&lt;BR /&gt; 20: 0 QEIC Level UCC Geth&lt;BR /&gt; 21: 20 IPIC Level i2c-mpc&lt;BR /&gt; 22: 3 IPIC Level i2c-mpc&lt;BR /&gt; &lt;STRONG&gt;23: 110&lt;/STRONG&gt; IPIC Level can0&lt;BR /&gt; 34: 0 QEIC Level UCC Geth&lt;BR /&gt; 38: 0 IPIC Level ehci_hcd:usb1&lt;BR /&gt; 77: 711 IPIC Level fsl-elbc&lt;BR /&gt;LOC: 247908 Local timer interrupts&lt;BR /&gt;SPU: 0 Spurious interrupts&lt;BR /&gt;CNT: 0 Performance monitoring interrupts&lt;BR /&gt;MCE: 0 Machine check exceptions&lt;BR /&gt;[root@mpc8309som test]# ifconfig &lt;BR /&gt;can0 Link encap:UNSPEC HWaddr 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00 &lt;BR /&gt; UP RUNNING NOARP MTU:16 Metric:1&lt;BR /&gt; RX packets:0 errors:0 dropped:0 overruns:0 frame:0&lt;BR /&gt; &lt;STRONG&gt;TX packets:110&lt;/STRONG&gt; errors:0 dropped:0 overruns:0 carrier:0&lt;BR /&gt; collisions:0 txqueuelen:64 &lt;BR /&gt; RX bytes:0 (0.0 b) TX bytes:880 (880.0 b)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 29 Mar 2017 07:59:12 GMT</pubDate>
    <dc:creator>dingzhiyu</dc:creator>
    <dc:date>2017-03-29T07:59:12Z</dc:date>
    <item>
      <title>flexcan write failure</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630571#M1797</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I use flexcan interface to send multiple frame datas of mpc8309, has small frame data send failure, why? help me,tks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ps. TXF is 112 , but interrupt number and&amp;nbsp;&lt;SPAN&gt;TX packets is110.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[root@mpc8309som test]# cat /proc/net/can/stats&lt;/P&gt;&lt;P&gt;112 transmitted frames (TXF)&lt;BR /&gt; &lt;STRONG&gt;112 received frames (RXF)&lt;/STRONG&gt;&lt;BR /&gt; 112 matched frames (RXMF)&lt;/P&gt;&lt;P&gt;100 % total match ratio (RXMR)&lt;BR /&gt; 0 frames/s total tx rate (TXR)&lt;BR /&gt; 0 frames/s total rx rate (RXR)&lt;/P&gt;&lt;P&gt;100 % current match ratio (CRXMR)&lt;BR /&gt; 0 frames/s current tx rate (CTXR)&lt;BR /&gt; 0 frames/s current rx rate (CRXR)&lt;/P&gt;&lt;P&gt;100 % max match ratio (MRXMR)&lt;BR /&gt; 37 frames/s max tx rate (MTXR)&lt;BR /&gt; 37 frames/s max rx rate (MRXR)&lt;/P&gt;&lt;P&gt;0 current receive list entries (CRCV)&lt;BR /&gt; 1 maximum receive list entries (MRCV)&lt;/P&gt;&lt;P&gt;[root@mpc8309som test]# cat /proc/interrupts &lt;BR /&gt; CPU0 &lt;BR /&gt; 16: 582 IPIC Level serial&lt;BR /&gt; 17: 0 IPIC Level mpc8xxx_spi&lt;BR /&gt; 19: 300 QEIC Level UCC Geth&lt;BR /&gt; 20: 0 QEIC Level UCC Geth&lt;BR /&gt; 21: 20 IPIC Level i2c-mpc&lt;BR /&gt; 22: 3 IPIC Level i2c-mpc&lt;BR /&gt; &lt;STRONG&gt;23: 110&lt;/STRONG&gt; IPIC Level can0&lt;BR /&gt; 34: 0 QEIC Level UCC Geth&lt;BR /&gt; 38: 0 IPIC Level ehci_hcd:usb1&lt;BR /&gt; 77: 711 IPIC Level fsl-elbc&lt;BR /&gt;LOC: 247908 Local timer interrupts&lt;BR /&gt;SPU: 0 Spurious interrupts&lt;BR /&gt;CNT: 0 Performance monitoring interrupts&lt;BR /&gt;MCE: 0 Machine check exceptions&lt;BR /&gt;[root@mpc8309som test]# ifconfig &lt;BR /&gt;can0 Link encap:UNSPEC HWaddr 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00 &lt;BR /&gt; UP RUNNING NOARP MTU:16 Metric:1&lt;BR /&gt; RX packets:0 errors:0 dropped:0 overruns:0 frame:0&lt;BR /&gt; &lt;STRONG&gt;TX packets:110&lt;/STRONG&gt; errors:0 dropped:0 overruns:0 carrier:0&lt;BR /&gt; collisions:0 txqueuelen:64 &lt;BR /&gt; RX bytes:0 (0.0 b) TX bytes:880 (880.0 b)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 29 Mar 2017 07:59:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630571#M1797</guid>
      <dc:creator>dingzhiyu</dc:creator>
      <dc:date>2017-03-29T07:59:12Z</dc:date>
    </item>
    <item>
      <title>Re: flexcan write failure</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630572#M1798</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;Look at the following page:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.kernel.org%2Fdoc%2FDocumentation%2Fnetworking%2Fcan.txt" rel="nofollow" target="_blank"&gt;https://www.kernel.org/doc/Documentation/networking/can.txt&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;Linux TX packets are not FlexCAN frames.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Pavel Chubakov&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Mar 2017 03:00:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630572#M1798</guid>
      <dc:creator>Pavel</dc:creator>
      <dc:date>2017-03-30T03:00:59Z</dc:date>
    </item>
    <item>
      <title>Re: flexcan write failure</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630573#M1799</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;How do modify can&amp;nbsp;bitrate in mpc8309 bsp? It is failure when I use ip tool.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Mar 2017 07:06:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630573#M1799</guid>
      <dc:creator>dingzhiyu</dc:creator>
      <dc:date>2017-03-30T07:06:29Z</dc:date>
    </item>
    <item>
      <title>Re: flexcan write failure</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630574#M1800</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I find the function is &amp;nbsp;empty of&amp;nbsp;&lt;SPAN&gt;flexcan_set_bitrate.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static void flexcan_set_bitrate(struct flexcan_device *flexcan, int bitrate)&lt;BR /&gt;{&lt;BR /&gt; /* TODO:: implement in future&lt;BR /&gt; * based on the bitrate to get the timing of&lt;BR /&gt; * presdiv, pseg1, pseg2, propseg&lt;BR /&gt; */&lt;BR /&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Mar 2017 07:09:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630574#M1800</guid>
      <dc:creator>dingzhiyu</dc:creator>
      <dc:date>2017-03-30T07:09:07Z</dc:date>
    </item>
    <item>
      <title>Re: flexcan write failure</title>
      <link>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630575#M1801</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;below is test code :&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#include &amp;lt;stdio.h&amp;gt;&lt;BR /&gt;#include &amp;lt;stdlib.h&amp;gt;&lt;BR /&gt;#include &amp;lt;unistd.h&amp;gt;&lt;BR /&gt;#include &amp;lt;string.h&amp;gt;&lt;BR /&gt;#include &amp;lt;signal.h&amp;gt;&lt;BR /&gt;#include &amp;lt;libgen.h&amp;gt;&lt;BR /&gt;#include &amp;lt;errno.h&amp;gt;&lt;BR /&gt;#include &amp;lt;string.h&amp;gt;&lt;BR /&gt;#include &amp;lt;time.h&amp;gt;&lt;BR /&gt;#include &amp;lt;sys/time.h&amp;gt;&lt;/P&gt;&lt;P&gt;#include &amp;lt;sys/types.h&amp;gt;&lt;BR /&gt;#include &amp;lt;sys/socket.h&amp;gt;&lt;BR /&gt;#include &amp;lt;sys/ioctl.h&amp;gt;&lt;BR /&gt;#include &amp;lt;sys/uio.h&amp;gt;&lt;BR /&gt;//#include &amp;lt;linux/can.h&amp;gt;&lt;BR /&gt;#include &amp;lt;net/if.h&amp;gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;typedef struct _CAN_S_ /* 发送帧数据缓冲区 */&lt;BR /&gt;{&lt;BR /&gt; unsigned char dLEN; /* 数据帧长度 */ &lt;BR /&gt; unsigned char dID1; /* 标示符ID1~ID29 */ &lt;BR /&gt; unsigned char dID2; &lt;BR /&gt; unsigned char dID3; &lt;BR /&gt; unsigned char dID4; &lt;BR /&gt; unsigned char mydata[8]; /* 数据 */ &lt;BR /&gt;}stcCAN_S, *P_stcCAN_S;&lt;/P&gt;&lt;P&gt;stcCAN_S CAN_S[50];&lt;/P&gt;&lt;P&gt;#include "can.h"&lt;/P&gt;&lt;P&gt;#define PF_CAN 29&lt;/P&gt;&lt;P&gt;extern int optind, opterr, optopt;&lt;/P&gt;&lt;P&gt;static int skt = -1;&lt;/P&gt;&lt;P&gt;void orgnize_id()&lt;BR /&gt;{&lt;BR /&gt; int i, j;&lt;BR /&gt; &lt;BR /&gt; CAN_S[0].dID1 = 0x00; // 80050088&lt;BR /&gt; CAN_S[0].dID2 = 0x85;&lt;BR /&gt; CAN_S[0].dID3 = 0x00; &lt;BR /&gt; CAN_S[0].dID4 = 0x08; &lt;BR /&gt; CAN_S[0].dLEN = 8;&lt;BR /&gt; &lt;BR /&gt; CAN_S[1].dID1 = 0x80; // 80050088&lt;BR /&gt; CAN_S[1].dID2 = 0x05;&lt;BR /&gt; CAN_S[1].dID3 = 0x00; &lt;BR /&gt; CAN_S[1].dID4 = 0x88; &lt;BR /&gt; CAN_S[1].dLEN = 8;&lt;BR /&gt; &lt;BR /&gt; for (i = 2; i &amp;lt; 36; i++) &lt;BR /&gt; { &lt;BR /&gt; j = i / 2;&lt;BR /&gt; CAN_S[i].dLEN = 8;&lt;BR /&gt; &lt;BR /&gt; CAN_S[i].dID1 = 0x80; &lt;BR /&gt; CAN_S[i].dID2 = 0x05; &lt;BR /&gt; CAN_S[i].dID3 = j; &lt;BR /&gt; &lt;BR /&gt; if (i%2 == 0) {&lt;BR /&gt; CAN_S[i].dID4 = 0x08; &lt;BR /&gt; }&lt;BR /&gt; else {&lt;BR /&gt; CAN_S[i].dID4 = 0x88; &lt;BR /&gt; } &lt;BR /&gt; }&lt;BR /&gt; &lt;BR /&gt; CAN_S[36].dID1 = 0x80;&lt;BR /&gt; CAN_S[36].dID2 = 0x85;&lt;BR /&gt; CAN_S[36].dID3 = 0x12; &lt;BR /&gt; CAN_S[36].dID4 = 0x08; &lt;BR /&gt; CAN_S[36].dLEN = 2;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void orgnize_data()&lt;BR /&gt;{&lt;BR /&gt; int i;&lt;BR /&gt; &lt;BR /&gt; CAN_S[0].mydata[0] = 0x20;&lt;BR /&gt; CAN_S[0].mydata[1] = 0x01;&lt;BR /&gt; CAN_S[0].mydata[2] = 0x05;&lt;BR /&gt; CAN_S[0].mydata[3] = 0x01;&lt;BR /&gt; CAN_S[0].mydata[4] = 0x00;&lt;BR /&gt; CAN_S[0].mydata[5] = 0xE0;&lt;BR /&gt; CAN_S[0].mydata[6] = 0x33;&lt;BR /&gt; CAN_S[0].mydata[7] = 0x0B;&lt;BR /&gt; &lt;BR /&gt; CAN_S[1].mydata[0] = 0x01;&lt;BR /&gt; CAN_S[1].mydata[1] = 0x00;&lt;BR /&gt; CAN_S[1].mydata[2] = 0x01;&lt;BR /&gt; CAN_S[1].mydata[3] = 0x00;&lt;BR /&gt; CAN_S[1].mydata[4] = 0x00;&lt;BR /&gt; CAN_S[1].mydata[5] = 0x02;&lt;BR /&gt; CAN_S[1].mydata[6] = 0x12;&lt;BR /&gt; CAN_S[1].mydata[7] = 0x01;&lt;BR /&gt; &lt;BR /&gt; CAN_S[2].mydata[0] = 0x30;&lt;BR /&gt; CAN_S[2].mydata[1] = 0x03;&lt;BR /&gt; CAN_S[2].mydata[2] = 0x30;&lt;BR /&gt; CAN_S[2].mydata[3] = 0x03;&lt;BR /&gt; CAN_S[2].mydata[4] = 0x80;&lt;BR /&gt; CAN_S[2].mydata[5] = 0x84;&lt;BR /&gt; CAN_S[2].mydata[6] = 0x7D;&lt;BR /&gt; CAN_S[2].mydata[7] = 0x00;&lt;BR /&gt; &lt;BR /&gt; CAN_S[3].mydata[0] = 0xFB;&lt;BR /&gt; CAN_S[3].mydata[1] = 0x01;&lt;BR /&gt; CAN_S[3].mydata[2] = 0x18;&lt;BR /&gt; CAN_S[3].mydata[3] = 0x03;&lt;BR /&gt; CAN_S[3].mydata[4] = 0xF4;&lt;BR /&gt; CAN_S[3].mydata[5] = 0x01;&lt;BR /&gt; CAN_S[3].mydata[6] = 0x10;&lt;BR /&gt; CAN_S[3].mydata[7] = 0x03; &lt;BR /&gt; &lt;BR /&gt; CAN_S[4].mydata[0] = 0x06;&lt;BR /&gt; CAN_S[4].mydata[1] = 0x02;&lt;BR /&gt; CAN_S[4].mydata[2] = 0x2B;&lt;BR /&gt; CAN_S[4].mydata[3] = 0x03;&lt;BR /&gt; CAN_S[4].mydata[4] = 0xF9;&lt;BR /&gt; CAN_S[4].mydata[5] = 0x01;&lt;BR /&gt; CAN_S[4].mydata[6] = 0x40;&lt;BR /&gt; CAN_S[4].mydata[7] = 0x03;&lt;BR /&gt; &lt;BR /&gt; CAN_S[5].mydata[0] = 0xF1;&lt;BR /&gt; CAN_S[5].mydata[1] = 0x01;&lt;BR /&gt; CAN_S[5].mydata[2] = 0xEF;&lt;BR /&gt; CAN_S[5].mydata[3] = 0x02;&lt;BR /&gt; CAN_S[5].mydata[4] = 0xFB;&lt;BR /&gt; CAN_S[5].mydata[5] = 0x01;&lt;BR /&gt; CAN_S[5].mydata[6] = 0xF2;&lt;BR /&gt; CAN_S[5].mydata[7] = 0x02; &lt;BR /&gt; &lt;BR /&gt; CAN_S[6].mydata[0] = 0x10;&lt;BR /&gt; CAN_S[6].mydata[1] = 0x02;&lt;BR /&gt; CAN_S[6].mydata[2] = 0x00;&lt;BR /&gt; CAN_S[6].mydata[3] = 0x03;&lt;BR /&gt; CAN_S[6].mydata[4] = 0xF9;&lt;BR /&gt; CAN_S[6].mydata[5] = 0x01;&lt;BR /&gt; CAN_S[6].mydata[6] = 0x2B;&lt;BR /&gt; CAN_S[6].mydata[7] = 0x03;&lt;BR /&gt; &lt;BR /&gt; for (i = 7; i &amp;lt; 34; i++)&lt;BR /&gt; {&lt;BR /&gt; CAN_S[i].mydata[0] = 0x00;&lt;BR /&gt; CAN_S[i].mydata[1] = 0x40;&lt;BR /&gt; CAN_S[i].mydata[2] = 0x00;&lt;BR /&gt; CAN_S[i].mydata[3] = 0x40;&lt;BR /&gt; CAN_S[i].mydata[4] = 0x00;&lt;BR /&gt; CAN_S[i].mydata[5] = 0x40;&lt;BR /&gt; CAN_S[i].mydata[6] = 0x00;&lt;BR /&gt; CAN_S[i].mydata[7] = 0x40;&lt;BR /&gt; }&lt;BR /&gt; &lt;BR /&gt; CAN_S[34].mydata[0] = 0x00;&lt;BR /&gt; CAN_S[34].mydata[1] = 0x40;&lt;BR /&gt; CAN_S[34].mydata[2] = 0x00;&lt;BR /&gt; CAN_S[34].mydata[3] = 0x00;&lt;BR /&gt; CAN_S[34].mydata[4] = 0xFF;&lt;BR /&gt; CAN_S[34].mydata[5] = 0xFF;&lt;BR /&gt; CAN_S[34].mydata[6] = 0xFF;&lt;BR /&gt; CAN_S[34].mydata[7] = 0xFF;&lt;BR /&gt; &lt;BR /&gt; CAN_S[35].mydata[0] = 0xFF;&lt;BR /&gt; CAN_S[35].mydata[1] = 0xFF;&lt;BR /&gt; CAN_S[35].mydata[2] = 0xFF;&lt;BR /&gt; CAN_S[35].mydata[3] = 0xFF;&lt;BR /&gt; CAN_S[35].mydata[4] = 0xFF;&lt;BR /&gt; CAN_S[35].mydata[5] = 0xFF;&lt;BR /&gt; CAN_S[35].mydata[6] = 0xFF;&lt;BR /&gt; CAN_S[35].mydata[7] = 0xFF;&lt;BR /&gt; &lt;BR /&gt; CAN_S[36].mydata[0] = 0xFF;&lt;BR /&gt; CAN_S[36].mydata[1] = 0xFF;&lt;BR /&gt; CAN_S[36].mydata[2] = 0xFF;&lt;BR /&gt; CAN_S[36].mydata[3] = 0xFF;&lt;BR /&gt; CAN_S[36].mydata[4] = 0x11;&lt;BR /&gt; CAN_S[36].mydata[5] = 0x22;&lt;BR /&gt; CAN_S[36].mydata[6] = 0x33;&lt;BR /&gt; CAN_S[36].mydata[7] = 0x44;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void print_usage(char *prg)&lt;BR /&gt;{&lt;BR /&gt; fprintf(stderr, "Usage: %s [can-interface]\n", prg);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void sys_usec_time(int type) &lt;BR /&gt;{ &lt;BR /&gt; struct timeval tv; &lt;BR /&gt; struct timezone tz; &lt;BR /&gt; struct tm *p; &lt;BR /&gt; &lt;BR /&gt; gettimeofday(&amp;amp;tv, &amp;amp;tz);&lt;BR /&gt; &lt;BR /&gt; p = localtime(&amp;amp;tv.tv_sec); &lt;BR /&gt; if (type == 0)&lt;BR /&gt; printf("begin time: %d:%d:%d.%ld\n", p-&amp;gt;tm_hour, p-&amp;gt;tm_min, p-&amp;gt;tm_sec, tv.tv_usec); &lt;BR /&gt; else&lt;BR /&gt; printf("end time: %d:%d:%d.%ld\n", p-&amp;gt;tm_hour, p-&amp;gt;tm_min, p-&amp;gt;tm_sec, tv.tv_usec); &lt;BR /&gt; &lt;BR /&gt; // printf("begin time: %d%d%d_%d:%d:%d.%ld\n", 1900+p-&amp;gt;tm_year, 1+p-&amp;gt;tm_mon, p-&amp;gt;tm_mday, p-&amp;gt;tm_hour, p-&amp;gt;tm_min, p-&amp;gt;tm_sec, tv.tv_usec); &lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void delay_us() // 500ns&lt;BR /&gt;{&lt;BR /&gt; int i;&lt;BR /&gt; &lt;BR /&gt; for (i = 0; i &amp;lt; 1000; i++)&lt;BR /&gt; ;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;int main(int argc, char **argv)&lt;BR /&gt;{&lt;BR /&gt; int family = PF_CAN, type = SOCK_RAW, proto = CAN_RAW;&lt;BR /&gt; int opt;&lt;BR /&gt; struct sockaddr_can addr;&lt;BR /&gt; struct ifreq ifr;&lt;BR /&gt; struct can_frame frame;&lt;BR /&gt; struct can_frame rframe;&lt;BR /&gt; int nbytes, i;&lt;BR /&gt; int verbose = 0;&lt;BR /&gt; int can = 5;&lt;BR /&gt; int ret = 0;&lt;BR /&gt; &lt;BR /&gt; orgnize_id();&lt;BR /&gt; orgnize_data();&lt;/P&gt;&lt;P&gt;if (optind == argc) &lt;BR /&gt; {&lt;BR /&gt; print_usage(basename(argv[0]));&lt;BR /&gt; exit(0);&lt;BR /&gt; }&lt;BR /&gt; &lt;BR /&gt; printf("interface = %s, family = PF_CAN, type = SOCK_RAW, proto = CAN_RAW\n", argv[optind]);&lt;/P&gt;&lt;P&gt;if ((skt = socket(PF_CAN, SOCK_RAW, CAN_RAW)) &amp;lt; 0)&lt;BR /&gt; {&lt;BR /&gt; perror("socket");&lt;BR /&gt; return 1;&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;addr.can_family = family;&lt;BR /&gt; strcpy(ifr.ifr_name, argv[optind]);&lt;BR /&gt; ioctl(skt, SIOCGIFINDEX, &amp;amp;ifr);&lt;BR /&gt; addr.can_ifindex = ifr.ifr_ifindex;&lt;BR /&gt; &lt;BR /&gt; // fcntl(fd, F_SETFL, O_NONBLOCK);&lt;BR /&gt; if (bind(skt, (struct sockaddr *)&amp;amp;addr, sizeof(addr)) &amp;lt; 0) &lt;BR /&gt; {&lt;BR /&gt; perror("bind");&lt;BR /&gt; return 1;&lt;BR /&gt; }&lt;BR /&gt; tcflush(skt, TCIOFLUSH);&lt;BR /&gt; sleep(1);&lt;BR /&gt; printf("begin send!\n");&lt;/P&gt;&lt;P&gt;//while(1) &lt;BR /&gt; { &lt;BR /&gt; printf("begin send data: \n");&lt;BR /&gt; //sys_usec_time(0);&lt;BR /&gt; for (i = 0; i &amp;lt; 37; i++)&lt;BR /&gt; { &lt;BR /&gt; frame.can_dlc = CAN_S[i].dLEN; // APP_S.mysize;&lt;BR /&gt; frame.can_id = (CAN_S[i].dID1&amp;lt;&amp;lt;24) |&lt;BR /&gt; (CAN_S[i].dID2&amp;lt;&amp;lt;16) |&lt;BR /&gt; (CAN_S[i].dID3&amp;lt;&amp;lt;8) |&lt;BR /&gt; (CAN_S[i].dID4);&lt;BR /&gt; frame.can_id = (frame.can_id &amp;gt;&amp;gt; 3) | 0x80000000;&lt;BR /&gt; &lt;BR /&gt; memcpy(frame.data, &amp;amp;CAN_S[i].mydata[0], CAN_S[i].dLEN);&lt;BR /&gt; &lt;BR /&gt; ret = write(skt, &amp;amp;frame, sizeof(frame));&lt;BR /&gt; // ret = sendto(skt, &amp;amp;frame, sizeof(struct can_frame),&lt;BR /&gt; // 0, (struct sockaddr*)&amp;amp;addr, sizeof(addr));&lt;BR /&gt; if ( ret &amp;lt; 0){ &lt;BR /&gt; if (errno == ENOBUFS) { &lt;BR /&gt; perror("ENOBUFS"); &lt;BR /&gt; //goto retry; &lt;BR /&gt; } else { &lt;BR /&gt; perror("write failed");&lt;BR /&gt; // goto failure; &lt;BR /&gt; }&lt;BR /&gt; }&lt;BR /&gt; // delay_us();&lt;BR /&gt; // tcflush(skt, TCIOFLUSH);&lt;BR /&gt; // usleep(1); //tcflush(skt, TCIOFLUSH); //usleep(1);&lt;BR /&gt; }&lt;BR /&gt; &lt;BR /&gt; for (i = 0; i &amp;lt; 37; i++)&lt;BR /&gt; { &lt;BR /&gt; frame.can_dlc = CAN_S[i].dLEN; // APP_S.mysize;&lt;BR /&gt; frame.can_id = (CAN_S[i].dID1&amp;lt;&amp;lt;24) |&lt;BR /&gt; (CAN_S[i].dID2&amp;lt;&amp;lt;16) |&lt;BR /&gt; (CAN_S[i].dID3&amp;lt;&amp;lt;8) |&lt;BR /&gt; (CAN_S[i].dID4);&lt;BR /&gt; frame.can_id = (frame.can_id &amp;gt;&amp;gt; 3) | 0x80000000;&lt;BR /&gt; &lt;BR /&gt; memcpy(frame.data, &amp;amp;CAN_S[i].mydata[0], CAN_S[i].dLEN);&lt;BR /&gt; &lt;BR /&gt; ret = write(skt, &amp;amp;frame, sizeof(frame));&lt;BR /&gt; // ret = sendto(skt, &amp;amp;frame, sizeof(struct can_frame),&lt;BR /&gt; // 0, (struct sockaddr*)&amp;amp;addr, sizeof(addr));&lt;BR /&gt; if ( ret &amp;lt; 0){ &lt;BR /&gt; if (errno == ENOBUFS) { &lt;BR /&gt; perror("ENOBUFS"); &lt;BR /&gt; //goto retry; &lt;BR /&gt; } else { &lt;BR /&gt; perror("write failed");&lt;BR /&gt; // goto failure; &lt;BR /&gt; }&lt;BR /&gt; }&lt;BR /&gt; // delay_us();&lt;BR /&gt; // tcflush(skt, TCIOFLUSH);&lt;BR /&gt; // usleep(1); //tcflush(skt, TCIOFLUSH); //usleep(1);&lt;BR /&gt; }&lt;BR /&gt; //tcflush(skt, TCIOFLUSH);&lt;BR /&gt; //sys_usec_time(1);&lt;BR /&gt; usleep(1000*1000);&lt;BR /&gt; &lt;BR /&gt; printf("i: %d\n", i); &lt;BR /&gt; &lt;BR /&gt; sleep(10);&lt;BR /&gt; //tcflush(skt, TCIOFLUSH);&lt;BR /&gt; printf("next loop!\n");&lt;BR /&gt; // usleep(1000*1000);&lt;BR /&gt; }&lt;BR /&gt; &lt;BR /&gt; return 0;&lt;BR /&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Mar 2017 08:14:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/PowerQUICC-Processors/flexcan-write-failure/m-p/630575#M1801</guid>
      <dc:creator>dingzhiyu</dc:creator>
      <dc:date>2017-03-30T08:14:09Z</dc:date>
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