PowerQUICC ProcessorsのトピックRe: One problem about XFC pin capacitor on MPC8260A?

One problem about XFC pin capacitor on MPC8260A?

mengjunling — Mon, 29 Jun 2015 08:40:27 GMT

One problem aboutXFC pin capacitor on MPC8260A?

I have debug the MPC8260ACZUMHB(266/166/66Mhz) succesfully, read PVR(00810101) and IMMR value(0024), the values indicate the chip is 0.29um(HiP3) version.

but now CPU changes to MPC8260ACZUMIB(266/200/66Mhz), the PVRand IMMR value(0062) indicate the chip is 0.25um(HiP4) version.

the same programm can't boot correctly, I try to change the XFC capacitor according MPC8260 Reference Manual, it still can't boot sucessfully, the UART(SMC1) outputs nothing.

XFC capacitor(0.25um)

min recommended max

MF*580-100 MF*680-120 MF*780-140

Aiso, I try to change core frequency and core voltage dependent on core frequency.

when core frequency is less than and equal to 200Mhz, the VDDL is set to 1.8V,

core frequency is greater than and equal to 233Mhz, the VDDL is set to 2.0V.

For example,

the frequency setting is 200/133/66, MF=2, XFC pin capacitor(1500pF), VDDL(1.8V).

or the frequency setting is 200/133/66,,MF=2, XFC pin capacitor(1500pF), VDDL(2.0V).

or the frequency setting is 266/166/66, MF=5, XFC pin capacitor(3500pF), VDDL(2.0V).

No matter which setting I select, the CPU can't boot succesfully, and UART outputs nothing.

Please help me to resolve the problem!

Thanks

Re: One problem about XFC pin capacitor on MPC8260A?

alexander_yakov — Tue, 30 Jun 2015 04:00:58 GMT

XFC is not the only difference between MPC8260 (Hip3) and MPC8260A (Hip4) devices, also core voltage is different and new functionality is present.

Because of the different core voltage, voltage sequencing circuit, recommended in Design Checklist (application note AN2290), Figure 1 - must be modified to sustain more voltage difference between I/O and core voltage.

Also, new MPC8260A device have new functionality (PCI block), which should be properly terminated if not used. The following is said in application note AN2291:

7.2 HiP4 Silicon

The spare pins U5, V4, and AE11 (on PCI devices, AE11 is CLKIN2; refer to the "MPC82xx/MPC82xxA

Functionality" table on page 2) may be pulled down (recommended) or may be left floating. However, on

all HiP4 silicon (both PCI and non-PCI devices) when PCI is not used, note the following:

AF25 must be pulled up or left floating

Re: One problem about XFC pin capacitor on MPC8260A?

mengjunling — Tue, 30 Jun 2015 07:45:54 GMT

The package mark is MPC8260ACZUMHB(266/166/66Mhz), PVR indicates Hip3 device, why? The ordering information indicates that "A" is Hip4 device.

On my board, the spare pins U5, V4, and AE11 (on PCI devices, AE11 is CLKIN2) is grouded.

and the AF25(PCI_MODE#) pin is pulled up.

"new MPC8260A device have new functionality (PCI block)" , which revision? Is MPC8260A(Hip4) devices?

I know only MPC8266,MPC8255,MPC8250 (these 3 devices) include PCI block,

Both MPC8260(Hip3) and MPC8260A(Hip4) don't include PCI block. Right?

In AN2291 , Mark and Revision, the table lists different chip revisions. the "Quailification" coloumn is "XC" or "MC", what is the meanings?

I try to modify the clock setting on board which can boot successfully(CPU is MPC8260ACZUMHB-266/166/66Mhz,0.29um Rev C.2),

the orginal setting is 200/133/66(MODCK_H=0101,MODCK=111), MF = 2, XFC pin capacitor 1500pF, according to AN2291( Hip3/Hip4 clock settings, MF*750-90=<XFC <= MF*840-90)

now I change to 200/166/66((MODCK_H=0110,MODCK=101), MF = 5 , XFC pin capacitor 3700pF, but CPU can't boot,

I use USB-TAP to check it, the programm jumps to 0x700 address(programm error), why ?

And I change to original clock setting and XFC capacitor, CPU boot succesffuly.

Re: One problem about XFC pin capacitor on MPC8260A?

alexander_yakov — Thu, 02 Jul 2015 03:35:44 GMT

If the package marking shows Hip4, but reading PVR register indicates Hip3 than I suspect this is a counterfeit product.

We are aware about counterfeit Freescale products, please read the following document:

http://cache.freescale.com/files/shared/doc/pcn/PCN11824.htm

Re: One problem about XFC pin capacitor on MPC8260A?

mengjunling — Fri, 03 Jul 2015 07:08:38 GMT

But the CPU marking Hip4 which PVR indicates Hip3 can boot succesffuly,

the device which marking Hip4 is identical to PVR can't boot. why?

I use USB-TAP check the SCCR register(0x00000019), but the reserved bit for MPC8250/MPC8265/MPC8266 have non-zero values, why?

According the MPC8260UM, the reserved for PCI devices should be zer0.

In the fiollowing table, the "Qualification" coloumn "XC"or "MC" , what's the meaning?

Re: One problem about XFC pin capacitor on MPC8260A?

alexander_yakov — Fri, 03 Jul 2015 09:41:08 GMT

Sorry, according to "Freescale Anti-Counterfeit Products Policy", Freescale does not provide support for counterfeit products.

Please return these devices to the place of purchase and order another ones from one of our authorized distributors:

http://www.freescale.com/webapp/sps/site/overview.jsp?code=DISTRIBUTORS

Re: One problem about XFC pin capacitor on MPC8260A?

mengjunling — Sun, 25 Oct 2015 09:40:16 GMT

Hi, alexander:

Now I buy MPC8260ACMHBB chips from RS, and assembly on my board.

I read the PVR and IMMR, the values indicates Hip4 revision, the package marking (4K25A QQDK1036 MALAYSIA) is identical to PVR/IMMR.

Now I have a new problem, when I power up my board, the UART(from SMC1) can't output anything, but keep powering after about several minutes, I reset my board,

UART can output correctly, I don't know why?

In my design I don't control the power sequence,VDD_Core(1.8V) and VDDH(3.3V) power up at the same time, but the VDD_Core powers quickly,

In AN2290, I find the following states, I want to know if the power sequence affect the MPC8260 boot and cause my problem?

2.3 Power Sequencing

One consequence of multiple power supplies is that when power is initially applied the voltage rails ramp

up at different rates. The rates depend on the nature of the power supply, the type of load on each power

supply, and the manner in which different voltages are derived. The following restrictions apply:

• VDD/VCCSYN—Must not exceed VDDH by more than 0.4 V at any time, including during

power-on reset.

• VDDH—Can exceed VDD/VCCSYN by 3.3 V during power on reset by no more than 100 msec.

During normal operation, should not exceed VDD/VCCSYN by more than 2.0 V (HiP3) or 2.5V

(HiP4).

• VIN—Must not exceed VDDH by more than 2.5 V at any time, including during power-on reset.

On my board, the spare pins U5, V4, and AE11 (on PCI devices, AE11 is CLKIN2) is grouded.

and the AF25(PCI_MODE#) pin is pulled up. XFC pin capacitor is 1200pF. Clocking setting is 200/133/66Mhz.

The Local bus interface is not used, so I left it floating, only fewer pins is connected.