topic Re: MPC8309 clock in PowerQUICC Processors

MPC8309 clock

qnb2013 — Mon, 16 Nov 2015 05:34:44 GMT

Hi All, I am working on Freescale's TWR-MPC8309 board, I know about the reset configuration words(RCWLR and RCWHR) control the clock, but I hard to understand that when the reset configuration words are writed to Flash? if I want to modify the system bus clock, what should I do? Can The coherent system bus clock(csb_clk) be modified? Thanks!

Re: MPC8309 clock

r8070z — Mon, 16 Nov 2015 15:05:52 GMT

Have a great day,

The MPC8309 has configuration inputs CFG_RESET_SOURCE[0:3] which are sampled on PORESET negation. The sampled value selects whether the device loads a reset configuration word from NOR Flash, NAND Flash, or an I2C EEPROM or uses hard-coded default options. Also debugger connected to the MPC8309 JTAG port can configure device. So there are options when device can start without RCW in the NOR flash.

Notice when you already have RCW and U-boot in the NOR flash you can rewrite the flash content in order to change the RCW. U-boot provides commands for common flash operations such as: reading sectors, erasing sectors, writing sectors, sector protecting. But take into account it is dangerous operation - you should not write invalid RCW or corrupt U-boot.

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Re: MPC8309 clock

qnb2013 — Thu, 19 Nov 2015 02:56:39 GMT

Thank you for help me!

How to ascertain the address of RCW in the NOR Flash if I rewrite the flash content. I know the 32M NOR flash starts at address 0xFE000000, the location for U-Boot is fixed(0xfe00_000--0xfe09_ffff)。

the 32M NOR flash contents:

0xfe00_0000 - 0xfe09_ffff U-Boot

0xfe0e_0000 - 0xfe0f_ffff DTB

0xfe10_0000 - 0xfe3f_ffff Kernel

0xfe7e_0000 - 0xfe7e_ffff QE ucode

0xfe80_0000 - 0xfeff_ffff Ramdisk file system

where does the device loads a reset configuration word from NOR Flash?