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    <title>topic Re: SPI communication between two MCF51QE128 in Processor Expert Software</title>
    <link>https://community.nxp.com/t5/Processor-Expert-Software/SPI-communication-between-two-MCF51QE128/m-p/212674#M952</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for your comments, they helped.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 22 Jun 2011 02:40:44 GMT</pubDate>
    <dc:creator>nlocatel</dc:creator>
    <dc:date>2011-06-22T02:40:44Z</dc:date>
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      <title>SPI communication between two MCF51QE128</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/SPI-communication-between-two-MCF51QE128/m-p/212672#M950</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi everyone,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm facing a little trouble establishing a SPI communication between two MCF51QE128.&lt;/P&gt;&lt;P&gt;I used the CodeWarrior processor expert to make the appropriate beans for both, one is the master and the other is configured as a slave. The beans configurations are apparently correct, clock speed is valid, and electrical link between pins is verified.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;But the slave is not executing the SPI Interruption Service Routine though clock and data are being sent&amp;nbsp;from master to slave. The SPI interruption in the slave is, of course, enabled.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can anyone help with this issue? I don't know what else to do.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;You know what, it's solved! It was just the slave select timing, we had to pull it down much more in advance.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks a lot.&lt;/P&gt;&lt;P&gt;Nicolas&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jun 2011 03:11:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/SPI-communication-between-two-MCF51QE128/m-p/212672#M950</guid>
      <dc:creator>nlocatel</dc:creator>
      <dc:date>2011-06-08T03:11:03Z</dc:date>
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    <item>
      <title>Re: SPI communication between two MCF51QE128</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/SPI-communication-between-two-MCF51QE128/m-p/212673#M951</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Be sure to watch how fast you run your SPI interface.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;There's a limit to how fast the slave device can accept data before it gets overrun.&amp;nbsp; In a hybrid mode where the first SPI RX byte in a message is received via interrupts, and the rest are accepted by polling, I couldn't get any faster than 1MHz SPI clock when using a 24 MHz external clock on an MCF51CN128 part.&amp;nbsp;&amp;nbsp; Going to 2MHz and we got overruns occuring regularly.&amp;nbsp; I didn't try to go any faster than 1MHz because our master only had a fixed choice of clock frequencies at whole MHz values.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Bottom line - for CPU to CPU SPI, the slave's ability to remove&amp;nbsp;data from the SPI RX buffer is the limiting factor.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;And yes, as you've discovered, slave select timing is important too.&amp;nbsp; Choose your SPI mode carefully as they are not created equally.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Jun 2011 20:48:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/SPI-communication-between-two-MCF51QE128/m-p/212673#M951</guid>
      <dc:creator>armistej</dc:creator>
      <dc:date>2011-06-20T20:48:57Z</dc:date>
    </item>
    <item>
      <title>Re: SPI communication between two MCF51QE128</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/SPI-communication-between-two-MCF51QE128/m-p/212674#M952</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for your comments, they helped.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 22 Jun 2011 02:40:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/SPI-communication-between-two-MCF51QE128/m-p/212674#M952</guid>
      <dc:creator>nlocatel</dc:creator>
      <dc:date>2011-06-22T02:40:44Z</dc:date>
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