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    <title>Processor Expert SoftwareのトピックRe: [LS1028A]:QSGMII link is not coming up in u-boot</title>
    <link>https://community.nxp.com/t5/Processor-Expert-Software/LS1028A-QSGMII-link-is-not-coming-up-in-u-boot/m-p/2270405#M6015</link>
    <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Please kindly share the RCW setting related to the SerDes, the DTS setting,&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;And all the difference of the QSGMII part between the LS1028ARDB and the customer board.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Thanks&lt;/P&gt;</description>
    <pubDate>Wed, 31 Dec 2025 09:28:08 GMT</pubDate>
    <dc:creator>June_Lu</dc:creator>
    <dc:date>2025-12-31T09:28:08Z</dc:date>
    <item>
      <title>[LS1028A]:QSGMII link is not coming up in u-boot</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/LS1028A-QSGMII-link-is-not-coming-up-in-u-boot/m-p/2269713#M6014</link>
      <description>&lt;P&gt;We have a custom board using the LS1028A(actually a VA7230) with a VSC8574RT ethernet quad PHY.&amp;nbsp; The LS1028 is connected to the PHY using QSGMII.&amp;nbsp; In the u-boot build (defconfig), I have enabled&amp;nbsp;CONFIG_PHY_MSCC and disabled&amp;nbsp;CONFIG_PHY_VITESSE.&amp;nbsp; Once u-boot comes up I am running these commands:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;&amp;gt; setenv ethact swp3
&amp;gt; setenv ipaddr 192.168.1.3
&amp;gt; ping 192.168.1.1&lt;/LI-CODE&gt;&lt;P&gt;Swp3 is directly connected to a PC with a static ip address of 192.168.1.1.&lt;/P&gt;&lt;P&gt;The ping times out and the host is not alive.&lt;/P&gt;&lt;P&gt;After further investigation, we have determined the following:&lt;BR /&gt;1) All of the external PHY's are detected and listed in the emdio-3 interface using the "mii info" command&lt;/P&gt;&lt;P&gt;2) The external PHY says that the link is up&lt;/P&gt;&lt;P&gt;3) The internal PHY says that the link is down&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;=&amp;gt; mii device enet-2
=&amp;gt; mii dump 3 1           
1.     (0009)                 -- PHY status register --                                                             
  (8000:0000) 1.15    =     0     100BASE-T4 able                                                                   
  (4000:0000) 1.14    =     0     100BASE-X  full duplex able                                                       
  (2000:0000) 1.13    =     0     100BASE-X  half duplex able                                                       
  (1000:0000) 1.12    =     0     10 Mbps    full duplex able                                                       
  (0800:0000) 1.11    =     0     10 Mbps    half duplex able                                                       
  (0400:0000) 1.10    =     0     100BASE-T2 full duplex able                                                       
  (0200:0000) 1. 9    =     0     100BASE-T2 half duplex able                                                       
  (0100:0000) 1. 8    =     0     extended status                                                                   
  (0080:0000) 1. 7    =     0     (reserved)                                                                        
  (0040:0000) 1. 6    =     0     MF preamble suppression                                                           
  (0020:0000) 1. 5    =     0     A/N complete                                                                      
  (0010:0000) 1. 4    =     0     remote fault                                                                      
  (0008:0008) 1. 3    =     1     A/N able                                                                          
  (0004:0000) 1. 2    =     0     link status                                                                       
  (0002:0000) 1. 1    =     0     jabber detect                                                                     
  (0001:0001) 1. 0    =     1     extended capabilities    &lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have compared this same setup with the LS1028ARDB devkit (which uses a VSC8514 external PHY) and it reports that its internal PHY link is up:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;=&amp;gt; mii dump 3 1                                                                                                                                                                                                           
1.     (002d)                 -- PHY status register --                                                                                 
  (8000:0000) 1.15    =     0     100BASE-T4 able                                                                                       
  (4000:0000) 1.14    =     0     100BASE-X  full duplex able                                                                           
  (2000:0000) 1.13    =     0     100BASE-X  half duplex able                                                                           
  (1000:0000) 1.12    =     0     10 Mbps    full duplex able                                                                           
  (0800:0000) 1.11    =     0     10 Mbps    half duplex able                                                                           
  (0400:0000) 1.10    =     0     100BASE-T2 full duplex able                                                                           
  (0200:0000) 1. 9    =     0     100BASE-T2 half duplex able                                                                           
  (0100:0000) 1. 8    =     0     extended status                                                                                       
  (0080:0000) 1. 7    =     0     (reserved)                                                                                            
  (0040:0000) 1. 6    =     0     MF preamble suppression                                                                               
  (0020:0020) 1. 5    =     1     A/N complete                                                                                          
  (0010:0000) 1. 4    =     0     remote fault                                                                                          
  (0008:0008) 1. 3    =     1     A/N able                                                                                              
  (0004:0004) 1. 2    =     1     link status                                                                                           
  (0002:0000) 1. 1    =     0     jabber detect                                                                                         
  (0001:0001) 1. 0    =     1     extended capabilities      &lt;/LI-CODE&gt;&lt;P&gt;What could be causing the internal PHY to not complete auto-neg and not bring the link up?&lt;/P&gt;</description>
      <pubDate>Mon, 29 Dec 2025 23:22:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/LS1028A-QSGMII-link-is-not-coming-up-in-u-boot/m-p/2269713#M6014</guid>
      <dc:creator>gjohnsona2e</dc:creator>
      <dc:date>2025-12-29T23:22:50Z</dc:date>
    </item>
    <item>
      <title>Re: [LS1028A]:QSGMII link is not coming up in u-boot</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/LS1028A-QSGMII-link-is-not-coming-up-in-u-boot/m-p/2270405#M6015</link>
      <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Please kindly share the RCW setting related to the SerDes, the DTS setting,&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;And all the difference of the QSGMII part between the LS1028ARDB and the customer board.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Wed, 31 Dec 2025 09:28:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/LS1028A-QSGMII-link-is-not-coming-up-in-u-boot/m-p/2270405#M6015</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2025-12-31T09:28:08Z</dc:date>
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