https://community.nxp.com/t5/Processor-Expert-Software/Memory-copy-using-load-multiple-instruction-LMW-in-T2080/m-p/1352338#M4855 <P><SPAN>Why DMA is not used for memory copy?</SPAN></P> Fri, 08 Oct 2021 05:33:08 GMT yipingwang 2021-10-08T05:33:08Z https://community.nxp.com/t5/Processor-Expert-Software/Memory-copy-using-load-multiple-instruction-LMW-in-T2080/m-p/1338641#M4817 <P>Hi,</P><P>I am trying to improve the memory copy performance from to/from the device attached to the PCIe interface , processor is T2080 , core is e6500.&nbsp;<BR />I can achieve the desired performance when i configure the PCIe BAR address space as cacheable but due to some restriction i should not make it<BR />cacheable and need to transmit / receive data without caching.</P><P>I am thinking to make the c routine which uses the load multiple instruction (LMW) for memory copy.<BR />Can i get some reference how to use this instruction in C routine for this task ?<BR />OR if any other ideas to make it easier ?</P><P>Thanks,<BR />Vijay</P> Sun, 12 Sep 2021 02:56:25 GMT https://community.nxp.com/t5/Processor-Expert-Software/Memory-copy-using-load-multiple-instruction-LMW-in-T2080/m-p/1338641#M4817 veejppee 2021-09-12T02:56:25Z https://community.nxp.com/t5/Processor-Expert-Software/Memory-copy-using-load-multiple-instruction-LMW-in-T2080/m-p/1352338#M4855 <P><SPAN>Why DMA is not used for memory copy?</SPAN></P> Fri, 08 Oct 2021 05:33:08 GMT https://community.nxp.com/t5/Processor-Expert-Software/Memory-copy-using-load-multiple-instruction-LMW-in-T2080/m-p/1352338#M4855 yipingwang 2021-10-08T05:33:08Z