<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>Processor Expert SoftwareのトピックRe: Possible Bug in PE with ENET Peripherial</title>
    <link>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/1261038#M4647</link>
    <description>&lt;P&gt;Hi Peter,&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I'm trying to get the ethernet interface on my TWR-K65F180M + TWR-SER working aswell.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I've never did something like that before. Do you have any tip how to get started?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Jill&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 13 Apr 2021 06:59:11 GMT</pubDate>
    <dc:creator>jill1</dc:creator>
    <dc:date>2021-04-13T06:59:11Z</dc:date>
    <item>
      <title>Possible Bug in PE with ENET Peripherial</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/455189#M3686</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm trying to get the ethernet interface on my TWR-K65F180M + TWR-SER working.&lt;/P&gt;&lt;P&gt;I try to use Processor Expert to do the Chip configuration.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It seems like the clock selection for RMII mode can not be done with PE. for some reason there is no choice available between EXTAL and ENET_1588_CLKIN.&lt;/P&gt;&lt;P&gt;See the attached screenshot.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Has anyone else tried&amp;nbsp; to get Ethernet on the TWR-K65F180M + TWR-SER working?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Nov 2015 15:49:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/455189#M3686</guid>
      <dc:creator>peterruesch</dc:creator>
      <dc:date>2015-11-03T15:49:22Z</dc:date>
    </item>
    <item>
      <title>Re: Possible Bug in PE with ENET Peripherial</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/455190#M3687</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;Thank you for reporting of this issue. I am also able to reproduce the issue in a TWR-K65F180M project (with KSDK 1.3.0). I have reported the defect to Processor Expert development team (PEXMCU-4057).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Marek Neuzil&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Nov 2015 12:53:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/455190#M3687</guid>
      <dc:creator>marek_neuzil</dc:creator>
      <dc:date>2015-11-04T12:53:55Z</dc:date>
    </item>
    <item>
      <title>Re: Possible Bug in PE with ENET Peripherial</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/455191#M3688</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;Processor Expert development team has provided the following workaround:&lt;/P&gt;&lt;P&gt;Add the Init_SIM component into the project and select the SDHC0_CLKIN pin in the RMII clock source property (in the Component Inspector), see below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_0.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/52469i57FB7386A1E040E4/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_0.png" alt="pastedImage_0.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Please note, that there is incorrect signal name of the ENET_1588_CLKIN signal but the selection of the SDHC0_CLKIN ensures that the RMIISRC bit (SOPT2 register) will be set to 1.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the Component Inspector window of the PinSettings component, select the ENET tab and select the PTE26 pin in the ENET TS clock input selection property, see below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/52534iFD6AA542F48836C0/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;This selection ensures routing of the PTE26 pin as the ENET_1588_CLKIN pin, i.e. there will be generated the following code:&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* Affects PORTE_PCR26 register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; PORT_HAL_SetMuxMode(PORTE,26UL,kPortMuxAlt2);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please note that the &lt;EM&gt;RMII EXTAL - External reference clock&lt;/EM&gt; property (on ENET tab of the PinSettings) cannot be used because the Init_ENET already define value of this property (allocation of the pin).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Marek Neuzil&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 30 Nov 2015 13:07:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/455191#M3688</guid>
      <dc:creator>marek_neuzil</dc:creator>
      <dc:date>2015-11-30T13:07:18Z</dc:date>
    </item>
    <item>
      <title>Re: Possible Bug in PE with ENET Peripherial</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/1261038#M4647</link>
      <description>&lt;P&gt;Hi Peter,&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I'm trying to get the ethernet interface on my TWR-K65F180M + TWR-SER working aswell.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I've never did something like that before. Do you have any tip how to get started?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Jill&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 13 Apr 2021 06:59:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/1261038#M4647</guid>
      <dc:creator>jill1</dc:creator>
      <dc:date>2021-04-13T06:59:11Z</dc:date>
    </item>
    <item>
      <title>Re: Possible Bug in PE with ENET Peripherial</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/1264325#M4664</link>
      <description>&lt;P&gt;Thanx for sharing this article, it was really helpful.&lt;/P&gt;</description>
      <pubDate>Mon, 19 Apr 2021 12:16:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/Possible-Bug-in-PE-with-ENET-Peripherial/m-p/1264325#M4664</guid>
      <dc:creator>rareskysix</dc:creator>
      <dc:date>2021-04-19T12:16:46Z</dc:date>
    </item>
  </channel>
</rss>

