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    <title>topic S12ZVL64 cant receive data in Processor Expert Software</title>
    <link>https://community.nxp.com/t5/Processor-Expert-Software/S12ZVL64-cant-receive-data/m-p/851089#M4270</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;the code reference to "ZVC192-IIC-HUMIDITY-CW106"(master mode/Non-interrupt mode )&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;//**********************************************************************************************&lt;BR /&gt;void Init_IIC(void);&lt;BR /&gt;void IIC_Start(void);&lt;BR /&gt;void IIC_Stop(void);&lt;BR /&gt;void IIC_RepeatStart(void);&lt;BR /&gt;void IIC_Delay(void);&lt;BR /&gt;void IIC_CycleWrite(byte bout);&lt;BR /&gt;byte IIC_CycleRead(byte ack);&lt;BR /&gt;void IIC_SendBlock(uint8_t address,uint8_t *WrPointer,uint8_t WrNumber,uint8_t mode);&lt;BR /&gt;void IIC_RecvBlock(uint8_t address,uint8_t *rdpointer,uint8_t rdNumber);&lt;BR /&gt;//**********************************************************************************************&lt;BR /&gt;// Private memory declarations&lt;BR /&gt;//**********************************************************************************************&lt;/DIV&gt;&lt;DIV&gt;static byte error;&lt;BR /&gt;static word timeout;&lt;/DIV&gt;&lt;DIV&gt;//==============================================================================&lt;BR /&gt;// Init_IIC module&lt;BR /&gt;//==============================================================================&lt;BR /&gt;void Init_IIC(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;IIC0IBFD = 0x80;&amp;nbsp;&amp;nbsp; //Frequency divider register&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;//see attached IIC calculator in excel file&lt;BR /&gt;&amp;nbsp;IIC0IBAD = 0x00;&amp;nbsp;&amp;nbsp; //Slave address of this module;&lt;BR /&gt;&amp;nbsp;IIC0IBCR = 0x80;&amp;nbsp;&amp;nbsp; //Enable I2C module, No interrupts; &lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;//*********************************************************&lt;BR /&gt;// Initiate IIC Start Condition&lt;BR /&gt;//*********************************************************&lt;BR /&gt;void IIC_Start(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; IIC0IBCR_MS_SL = 1;&lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_IBB) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x01;&lt;BR /&gt;} //*** Wait until BUSY=1&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;//*********************************************************&lt;BR /&gt;// Initiate IIC Stop Condition&lt;BR /&gt;//*********************************************************&lt;BR /&gt;void IIC_Stop(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; IIC0IBCR_MS_SL = 0;&lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ( (IIC0IBSR_IBB) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x02;&lt;BR /&gt;} //*** Wait until BUSY=0&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;//*********************************************************&lt;BR /&gt;// Initiate IIC Repeat Start Condition&lt;BR /&gt;//*********************************************************&lt;BR /&gt;void IIC_RepeatStart(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; IIC0IBCR_RSTA = 1;&lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_IBB) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x04;&lt;BR /&gt;} //*** Wait until BUSY=1&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;//*********************************************************&lt;BR /&gt;// IIC Delay&lt;BR /&gt;//*********************************************************&lt;BR /&gt;void IIC_Delay(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; byte IICd;&lt;BR /&gt;&amp;nbsp; for (IICd=0; IICd&amp;lt;100; IICd++){};&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;//*********************************************************&lt;BR /&gt;// IIC Cycle Write&lt;BR /&gt;//*********************************************************&lt;BR /&gt;void IIC_CycleWrite(byte bout)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_TCF) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x08; &lt;BR /&gt;&amp;nbsp; IIC0IBDR = bout; &lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_IBIF) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x10;&lt;BR /&gt;&amp;nbsp; IIC0IBSR_IBIF = 1; &lt;BR /&gt;&amp;nbsp; if (IIC0IBSR_RXAK)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x20;&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;//*********************************************************&lt;BR /&gt;// IIC Cycle Read&lt;BR /&gt;//*********************************************************&lt;BR /&gt;byte IIC_CycleRead(byte ack)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; byte bread; &lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_TCF) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error|=0x08;&lt;BR /&gt;&amp;nbsp; IIC0IBCR_TX_RX = 0;&lt;BR /&gt;&amp;nbsp; IIC0IBCR_TXAK = ack;&lt;BR /&gt;&amp;nbsp; bread = IIC0IBDR; &lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_IBIF) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x10;&lt;BR /&gt;&amp;nbsp; IIC0IBSR_IBIF=1;&lt;BR /&gt;&amp;nbsp; return bread;&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;///////////////////////////////////////////////////////////////////////&lt;/DIV&gt;&lt;DIV&gt;void IIC_SendBlock(uint8_t address,uint8_t *WrPointer,uint8_t WrNumber,uint8_t mode)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;uint8_t i;&lt;BR /&gt;&amp;nbsp;IIC0IBCR_TX_RX = 1;&lt;BR /&gt;&amp;nbsp;IIC_Start();&lt;BR /&gt;&amp;nbsp;IIC_CycleWrite(address&amp;amp;0xfe);&lt;BR /&gt;&amp;nbsp;for(i=0;i&amp;lt;WrNumber;i++)&lt;BR /&gt;&amp;nbsp;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;IIC_CycleWrite(*WrPointer);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;WrPointer++;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;}&lt;BR /&gt;&amp;nbsp;if(mode==0)IIC_Stop();&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;///////////////////////////////////////////////////////////////////////////////////&lt;/DIV&gt;&lt;DIV&gt;void IIC_RecvBlock(uint8_t address,uint8_t *rdpointer,uint8_t rdNumber)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;uint8_t i;&lt;BR /&gt;&amp;nbsp;uint8_t send_ack=0;&lt;BR /&gt;&amp;nbsp;IIC0IBCR_TX_RX = 1;&lt;BR /&gt;&amp;nbsp;IIC_RepeatStart();&lt;BR /&gt;&amp;nbsp;IIC_CycleWrite(address|0x01); &lt;BR /&gt;&amp;nbsp;for(i=0;i&amp;lt;rdNumber;i++)&lt;BR /&gt;&amp;nbsp;{&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;if(i==(rdNumber-1))send_ack=1;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;else send_ack=0;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;*rdpointer=IIC_CycleRead(send_ack);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;rdpointer++;&lt;BR /&gt;&amp;nbsp;}&lt;BR /&gt;&amp;nbsp;IIC_Stop();&lt;BR /&gt;}&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 26 Feb 2019 11:44:34 GMT</pubDate>
    <dc:creator>yongd丁</dc:creator>
    <dc:date>2019-02-26T11:44:34Z</dc:date>
    <item>
      <title>S12ZVL64 cant receive data</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/S12ZVL64-cant-receive-data/m-p/851089#M4270</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;the code reference to "ZVC192-IIC-HUMIDITY-CW106"(master mode/Non-interrupt mode )&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;//**********************************************************************************************&lt;BR /&gt;void Init_IIC(void);&lt;BR /&gt;void IIC_Start(void);&lt;BR /&gt;void IIC_Stop(void);&lt;BR /&gt;void IIC_RepeatStart(void);&lt;BR /&gt;void IIC_Delay(void);&lt;BR /&gt;void IIC_CycleWrite(byte bout);&lt;BR /&gt;byte IIC_CycleRead(byte ack);&lt;BR /&gt;void IIC_SendBlock(uint8_t address,uint8_t *WrPointer,uint8_t WrNumber,uint8_t mode);&lt;BR /&gt;void IIC_RecvBlock(uint8_t address,uint8_t *rdpointer,uint8_t rdNumber);&lt;BR /&gt;//**********************************************************************************************&lt;BR /&gt;// Private memory declarations&lt;BR /&gt;//**********************************************************************************************&lt;/DIV&gt;&lt;DIV&gt;static byte error;&lt;BR /&gt;static word timeout;&lt;/DIV&gt;&lt;DIV&gt;//==============================================================================&lt;BR /&gt;// Init_IIC module&lt;BR /&gt;//==============================================================================&lt;BR /&gt;void Init_IIC(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;IIC0IBFD = 0x80;&amp;nbsp;&amp;nbsp; //Frequency divider register&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;//see attached IIC calculator in excel file&lt;BR /&gt;&amp;nbsp;IIC0IBAD = 0x00;&amp;nbsp;&amp;nbsp; //Slave address of this module;&lt;BR /&gt;&amp;nbsp;IIC0IBCR = 0x80;&amp;nbsp;&amp;nbsp; //Enable I2C module, No interrupts; &lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;//*********************************************************&lt;BR /&gt;// Initiate IIC Start Condition&lt;BR /&gt;//*********************************************************&lt;BR /&gt;void IIC_Start(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; IIC0IBCR_MS_SL = 1;&lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_IBB) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x01;&lt;BR /&gt;} //*** Wait until BUSY=1&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;//*********************************************************&lt;BR /&gt;// Initiate IIC Stop Condition&lt;BR /&gt;//*********************************************************&lt;BR /&gt;void IIC_Stop(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; IIC0IBCR_MS_SL = 0;&lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ( (IIC0IBSR_IBB) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x02;&lt;BR /&gt;} //*** Wait until BUSY=0&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;//*********************************************************&lt;BR /&gt;// Initiate IIC Repeat Start Condition&lt;BR /&gt;//*********************************************************&lt;BR /&gt;void IIC_RepeatStart(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; IIC0IBCR_RSTA = 1;&lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_IBB) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x04;&lt;BR /&gt;} //*** Wait until BUSY=1&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;//*********************************************************&lt;BR /&gt;// IIC Delay&lt;BR /&gt;//*********************************************************&lt;BR /&gt;void IIC_Delay(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; byte IICd;&lt;BR /&gt;&amp;nbsp; for (IICd=0; IICd&amp;lt;100; IICd++){};&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;//*********************************************************&lt;BR /&gt;// IIC Cycle Write&lt;BR /&gt;//*********************************************************&lt;BR /&gt;void IIC_CycleWrite(byte bout)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_TCF) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x08; &lt;BR /&gt;&amp;nbsp; IIC0IBDR = bout; &lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_IBIF) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x10;&lt;BR /&gt;&amp;nbsp; IIC0IBSR_IBIF = 1; &lt;BR /&gt;&amp;nbsp; if (IIC0IBSR_RXAK)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x20;&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;//*********************************************************&lt;BR /&gt;// IIC Cycle Read&lt;BR /&gt;//*********************************************************&lt;BR /&gt;byte IIC_CycleRead(byte ack)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; byte bread; &lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_TCF) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error|=0x08;&lt;BR /&gt;&amp;nbsp; IIC0IBCR_TX_RX = 0;&lt;BR /&gt;&amp;nbsp; IIC0IBCR_TXAK = ack;&lt;BR /&gt;&amp;nbsp; bread = IIC0IBDR; &lt;BR /&gt;&amp;nbsp; timeout = 0;&lt;BR /&gt;&amp;nbsp; while ((!IIC0IBSR_IBIF) &amp;amp;&amp;amp; (timeout&amp;lt;1000))&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; timeout++;&lt;BR /&gt;&amp;nbsp; if (timeout &amp;gt;= 1000)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; error |= 0x10;&lt;BR /&gt;&amp;nbsp; IIC0IBSR_IBIF=1;&lt;BR /&gt;&amp;nbsp; return bread;&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;///////////////////////////////////////////////////////////////////////&lt;/DIV&gt;&lt;DIV&gt;void IIC_SendBlock(uint8_t address,uint8_t *WrPointer,uint8_t WrNumber,uint8_t mode)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;uint8_t i;&lt;BR /&gt;&amp;nbsp;IIC0IBCR_TX_RX = 1;&lt;BR /&gt;&amp;nbsp;IIC_Start();&lt;BR /&gt;&amp;nbsp;IIC_CycleWrite(address&amp;amp;0xfe);&lt;BR /&gt;&amp;nbsp;for(i=0;i&amp;lt;WrNumber;i++)&lt;BR /&gt;&amp;nbsp;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;IIC_CycleWrite(*WrPointer);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;WrPointer++;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;}&lt;BR /&gt;&amp;nbsp;if(mode==0)IIC_Stop();&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;///////////////////////////////////////////////////////////////////////////////////&lt;/DIV&gt;&lt;DIV&gt;void IIC_RecvBlock(uint8_t address,uint8_t *rdpointer,uint8_t rdNumber)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;uint8_t i;&lt;BR /&gt;&amp;nbsp;uint8_t send_ack=0;&lt;BR /&gt;&amp;nbsp;IIC0IBCR_TX_RX = 1;&lt;BR /&gt;&amp;nbsp;IIC_RepeatStart();&lt;BR /&gt;&amp;nbsp;IIC_CycleWrite(address|0x01); &lt;BR /&gt;&amp;nbsp;for(i=0;i&amp;lt;rdNumber;i++)&lt;BR /&gt;&amp;nbsp;{&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;if(i==(rdNumber-1))send_ack=1;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;else send_ack=0;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;*rdpointer=IIC_CycleRead(send_ack);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;rdpointer++;&lt;BR /&gt;&amp;nbsp;}&lt;BR /&gt;&amp;nbsp;IIC_Stop();&lt;BR /&gt;}&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Feb 2019 11:44:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/S12ZVL64-cant-receive-data/m-p/851089#M4270</guid>
      <dc:creator>yongd丁</dc:creator>
      <dc:date>2019-02-26T11:44:34Z</dc:date>
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