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    <title>Processor Expert SoftwareのトピックT2080RDB Ram test without caching</title>
    <link>https://community.nxp.com/t5/Processor-Expert-Software/T2080RDB-Ram-test-without-caching/m-p/698019#M4070</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'm trying to implement a RAM memory test based on memtester sources.&lt;/P&gt;&lt;P&gt;I need to directly access RAM locations, without the intervention of the cache, but by analyzing memtester sources I can't find any kind of mechanism to prevent cache utilization.&lt;/P&gt;&lt;P&gt;Is the cache flush, after each write/read operation sufficient to force access to RAM?&lt;/P&gt;&lt;P&gt;Or should I completely disable Dcahing? (in this case How can I proceed?).&lt;/P&gt;&lt;P&gt;I attach some memtester source files. It could help to find how they avoid memory caching.&lt;/P&gt;&lt;P&gt;B.R.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-339179"&gt;tests.c.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-339179"&gt;memtester.c.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-339179"&gt;memtester.h.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-339179"&gt;tests.h.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 04 Oct 2017 09:10:11 GMT</pubDate>
    <dc:creator>francescocaiazz</dc:creator>
    <dc:date>2017-10-04T09:10:11Z</dc:date>
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      <title>T2080RDB Ram test without caching</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/T2080RDB-Ram-test-without-caching/m-p/698019#M4070</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'm trying to implement a RAM memory test based on memtester sources.&lt;/P&gt;&lt;P&gt;I need to directly access RAM locations, without the intervention of the cache, but by analyzing memtester sources I can't find any kind of mechanism to prevent cache utilization.&lt;/P&gt;&lt;P&gt;Is the cache flush, after each write/read operation sufficient to force access to RAM?&lt;/P&gt;&lt;P&gt;Or should I completely disable Dcahing? (in this case How can I proceed?).&lt;/P&gt;&lt;P&gt;I attach some memtester source files. It could help to find how they avoid memory caching.&lt;/P&gt;&lt;P&gt;B.R.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-339179"&gt;tests.c.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-339179"&gt;memtester.c.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-339179"&gt;memtester.h.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-339179"&gt;tests.h.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Oct 2017 09:10:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/T2080RDB-Ram-test-without-caching/m-p/698019#M4070</guid>
      <dc:creator>francescocaiazz</dc:creator>
      <dc:date>2017-10-04T09:10:11Z</dc:date>
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