Processor Expert Software中的主题 Re: kl25z ADC muxing problem.

kl25z ADC muxing problem.

avnergidron — Wed, 25 Nov 2015 08:25:03 GMT

Hi,

I am trying to configure an ADC component in PE under the KDS and the FRDM-KL25Z board. I am using the ADC0 and I want to use 4 channels:

ADC0_DP0/ADC0_SE0/PTE20/TPM1_CH0/UART0_TX
ADC0_DM0/ADC0_SE4a/PTE21/TPM1_CH1/UART0_RX
ADC0_DM3/ADC0_SE7a/PTE23/TPM2_CH1/UART2_RX
ADC0_SE7b/PTD6/LLWU_P15/SPI1_MOSI/UART0_RX/SPI1_MISO

My problem is that the last three are giving me the following problem:

This setting causes a conflict in the ADC0_CFG2[MUXSEL] - pins muxed by the same bit field(s) must be set identically. (A/D channel (pin))

Here is what I am trying to configure:

what am I doing wrong?

Thanks,

Avner

Re: kl25z ADC muxing problem.

avnergidron — Wed, 25 Nov 2015 12:02:45 GMT

I found this after reading a bit:Re: ADC_LDD for Kinetis K20

I saw it was written in 2011... is it possible to control muxing in PE? or should I still do it by hand in real time?

if it is not possible, can someone help me to understand how I can do it?

thanks in advance,

Avner

Re: kl25z ADC muxing problem.

marek_neuzil — Wed, 02 Dec 2015 13:59:28 GMT

Hello,

The reported error means that you have selected both ADC0_SE a channels and also ADC_SE b channels in one ADC_LDD component. These groups of channels (a and b) are switched by using MUXSEL bit in ADC0_CFG2 register. You must select channels from one group of channels only. List of mixed groups is not supported.

For example, select:

ADC0_SE0
ADC0_SE4a
ADC0_SE7a
ADC0_SE6a

ADC0_SE0
ADC0_SE4b
ADC0_SE7b
ADC0_SE6b

Best Regards,

Marek Neuzil