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    <title>topic Re: Init of FlexBus pins in SDRAM mdoe in Processor Expert Software</title>
    <link>https://community.nxp.com/t5/Processor-Expert-Software/Init-of-FlexBus-pins-in-SDRAM-mode/m-p/421079#M3424</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;This is known issue of Processor Expert that will be fixed in the next release. There is also available a hot fix for this issue, see the attached archive.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 10 Aug 2015 11:46:38 GMT</pubDate>
    <dc:creator>marek_neuzil</dc:creator>
    <dc:date>2015-08-10T11:46:38Z</dc:date>
    <item>
      <title>Init of FlexBus pins in SDRAM mode</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/Init-of-FlexBus-pins-in-SDRAM-mode/m-p/421077#M3422</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm trying to get the external SDRAM on the TWR-K65 working using KDS and PE.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After comparing various register settings in the initialization phase with AN5095SW I realized that I need to change the FB_CSPMCR value to get the SDRAM working.&lt;/P&gt;&lt;P&gt;The generated pin init code for the SDRAM contains a section for setting the FB_CSPMCR but unfortunately the values listed there are leading to a non functional SDRAM.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I can't find a entry in the PE SDRAM component to edit these values.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;All I can do is add the FB component and change it there, but this is not what i want.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So my question: How can i control the FB muxing in the SDRAM component in Processor Expert to generate the parameters like described in the code sample below ?&lt;/P&gt;&lt;P&gt;The function in question is init_sdram_pins().&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_macro_code _jivemacro_uid_14389420630668278 jive_text_macro" data-renderedposition="323_8_1232_176" jivemacro_uid="_14389420630668278"&gt;&lt;P&gt;void init_sdram_pins(uint32_t instance)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* Affects PORTD_PCR4 register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; PORT_HAL_SetMuxMode(PORTD,4UL,kPortMuxAlt5);&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;&amp;nbsp; FLEXBUS_HAL_SetMultiplexControlGroup2(FB, kFlexbusMultiplexGroup2_FB_TSIZ0);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp; FLEXBUS_HAL_SetMultiplexControlGroup3(FB, kFlexbusMultiplexGroup3_FB_TSIZ1);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp; FLEXBUS_HAL_SetMultiplexControlGroup4(FB, kFlexbusMultiplexGroup4_FB_CS2);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp; FLEXBUS_HAL_SetMultiplexControlGroup5(FB, kFlexbusMultiplexGroup5_FB_CS3);&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;must be changed to&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_macro_code _jivemacro_uid_14389419903005135 jive_text_macro" data-renderedposition="562_8_1232_176" jivemacro_uid="_14389419903005135"&gt;&lt;P&gt;void init_sdram_pins(uint32_t instance)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* Affects PORTD_PCR4 register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; PORT_HAL_SetMuxMode(PORTD,4UL,kPortMuxAlt5);&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;&amp;nbsp; FLEXBUS_HAL_SetMultiplexControlGroup2(FB,&lt;STRONG&gt; kFlexbusMultiplexGroup2_FB_BE_31_24&lt;/STRONG&gt;);&lt;/P&gt;&lt;P&gt;&amp;nbsp; FLEXBUS_HAL_SetMultiplexControlGroup3(FB, &lt;STRONG&gt;kFlexbusMultiplexGroup3_FB_BE_23_16&lt;/STRONG&gt;);&lt;/P&gt;&lt;P&gt;&amp;nbsp; FLEXBUS_HAL_SetMultiplexControlGroup4(FB, kFlexbusMultiplexGroup4_FB_BE_15_8);&lt;/P&gt;&lt;P&gt;&amp;nbsp; FLEXBUS_HAL_SetMultiplexControlGroup5(FB, kFlexbusMultiplexGroup5_FB_BE_7_0);&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;/PRE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Aug 2015 09:58:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/Init-of-FlexBus-pins-in-SDRAM-mode/m-p/421077#M3422</guid>
      <dc:creator>peterruesch</dc:creator>
      <dc:date>2015-08-07T09:58:06Z</dc:date>
    </item>
    <item>
      <title>Re: Init of FlexBus pins in SDRAM mdoe</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/Init-of-FlexBus-pins-in-SDRAM-mode/m-p/421078#M3423</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;(1) You use which version of KDS ? And&amp;nbsp; you use the PE or SDK_PE ? please screenshot&amp;nbsp; your component of project .I will configure it on my side.&lt;/P&gt;&lt;P&gt;(2) And you can do as this, after your change the code&amp;nbsp; manually, then select "Don't Write Generated Component Modules",&lt;/P&gt;&lt;P&gt;the code will be you want .&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_0.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/52152iB8AE8EB42315828D/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_0.png" alt="pastedImage_0.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope it helps&lt;/P&gt;&lt;P&gt;Alice&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 10 Aug 2015 02:21:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/Init-of-FlexBus-pins-in-SDRAM-mode/m-p/421078#M3423</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2015-08-10T02:21:37Z</dc:date>
    </item>
    <item>
      <title>Re: Init of FlexBus pins in SDRAM mdoe</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/Init-of-FlexBus-pins-in-SDRAM-mode/m-p/421079#M3424</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;This is known issue of Processor Expert that will be fixed in the next release. There is also available a hot fix for this issue, see the attached archive.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 10 Aug 2015 11:46:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/Init-of-FlexBus-pins-in-SDRAM-mode/m-p/421079#M3424</guid>
      <dc:creator>marek_neuzil</dc:creator>
      <dc:date>2015-08-10T11:46:38Z</dc:date>
    </item>
    <item>
      <title>Re: Init of FlexBus pins in SDRAM mdoe</title>
      <link>https://community.nxp.com/t5/Processor-Expert-Software/Init-of-FlexBus-pins-in-SDRAM-mode/m-p/421080#M3425</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;thank you guys.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Good to know you are already looking into it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What other fixes will the upcoming release contain?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;best regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 10 Aug 2015 12:15:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Processor-Expert-Software/Init-of-FlexBus-pins-in-SDRAM-mode/m-p/421080#M3425</guid>
      <dc:creator>peterruesch</dc:creator>
      <dc:date>2015-08-10T12:15:34Z</dc:date>
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