topic Re: P1010 IFC Flash Support in P-Series https://community.nxp.com/t5/P-Series/P1010-IFC-Flash-Support/m-p/293401#M988 <HTML><HEAD></HEAD><BODY><P>The P1010 IFC supports four memory banks. One per chip select. As memory bank size in this case they mean size of external memory connected to single chip select using available address pins.</P><P>The IFC has 25 address pins. For 8-bit device with separate address bus (like typical NOR flash) it can address up to 2^25 bytes = 32MB. Actually it is not absolute limit for IFC bank. For example GASIC can provide address sequentially as 2 x 16-bit or 4 x 8-bit.</P></BODY></HTML> Mon, 25 Nov 2013 09:07:59 GMT r8070z 2013-11-25T09:07:59Z P1010 IFC Flash Support https://community.nxp.com/t5/P-Series/P1010-IFC-Flash-Support/m-p/293400#M987 <HTML><HEAD></HEAD><BODY><P><SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;">Hi everyone,</SPAN></P><P><SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"><BR /></SPAN></P><P><SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;">I am confused with P1010 Reference manual - P1010RM: The integrated flash controller:</SPAN></P><P><SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"><BR /></SPAN></P><P style="padding-left: 30px;"><SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;">Chapter "12.1.1 IFC features summary"</SPAN></P><P style="padding-left: 30px;"><SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;">pp. 489 "[IFC] Supports memory banks of sizes up to 32 MB".</SPAN></P><P><SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 10pt; line-height: 1.5em;"><BR /></SPAN></P><P>Should it be a memory block instead of memory bank? Or a memory bank means here a Flash chip?</P><P>I know that memory blocks can be grouped into memory banks like in Micron's parallel NOR Flash embedded multiple bank memory M29DW256G, which has a quadruple bank memory array: 32Mb + 96Mb +96Mb + 32Mb with parameter blocks at top and bottom.</P><P><SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"><BR /></SPAN></P><P><SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"><BR /></SPAN></P></BODY></HTML> Fri, 22 Nov 2013 17:36:37 GMT https://community.nxp.com/t5/P-Series/P1010-IFC-Flash-Support/m-p/293400#M987 tomaszkrupski 2013-11-22T17:36:37Z Re: P1010 IFC Flash Support https://community.nxp.com/t5/P-Series/P1010-IFC-Flash-Support/m-p/293401#M988 <HTML><HEAD></HEAD><BODY><P>The P1010 IFC supports four memory banks. One per chip select. As memory bank size in this case they mean size of external memory connected to single chip select using available address pins.</P><P>The IFC has 25 address pins. For 8-bit device with separate address bus (like typical NOR flash) it can address up to 2^25 bytes = 32MB. Actually it is not absolute limit for IFC bank. For example GASIC can provide address sequentially as 2 x 16-bit or 4 x 8-bit.</P></BODY></HTML> Mon, 25 Nov 2013 09:07:59 GMT https://community.nxp.com/t5/P-Series/P1010-IFC-Flash-Support/m-p/293401#M988 r8070z 2013-11-25T09:07:59Z