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    <title>topic Re: P2041RDB PCIe Problem . (vxWorks) in P-Series</title>
    <link>https://community.nxp.com/t5/P-Series/P2041RDB-PCIe-Problem-vxWorks/m-p/284945#M941</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you use a custom board? If not, why don't you use SDK 1.4 which is available on &lt;A href="http://www.freescale.com/webapp/search/Serp.jsp?QueryText=qoriq+sdk+1.4&amp;amp;assetIdResult=&amp;amp;attempt=1&amp;amp;lastQueryText=sdk+1.4&amp;amp;isFromFlex=false&amp;amp;getResult=false&amp;amp;assetLockedForNavigation=false&amp;amp;iteration=1&amp;amp;fsrch=1&amp;amp;isComparison=false&amp;amp;showAllCategories=false&amp;amp;sessionChecker=Kl-37Rx%2BGW73Xt2KRbY9wqc9.ebiz_ms1&amp;amp;getTree=false&amp;amp;fromTrng=false&amp;amp;fromPSP=false&amp;amp;getFilter=false&amp;amp;assetLocked=false&amp;amp;fromCust=false&amp;amp;showCustomCollateral=false&amp;amp;RELEVANCE=true&amp;amp;SelectedAsset=Downloads&amp;amp;fromWebPages=false&amp;amp;fromASP=false&amp;amp;fromMobile=false&amp;amp;isAdvanceSearch=false&amp;amp;isTree=false&amp;amp;fromDAP=false&amp;amp;isResult=false"&gt;freescale.com&lt;/A&gt;. Also, you rcw file set PCIe on Slot1 and according with P2041 reference manual, your application should use PCIe2 controller for communication with PCIe device.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SerDes 0x19 -&amp;gt; Bank 1 C: SGMII1, D: SGMII2, E,F: PCIe2, G: SGMII3, H: SGMII4 &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Adrian &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 18 Oct 2013 12:58:18 GMT</pubDate>
    <dc:creator>addiyi</dc:creator>
    <dc:date>2013-10-18T12:58:18Z</dc:date>
    <item>
      <title>P2041RDB PCIe Problem . (vxWorks)</title>
      <link>https://community.nxp.com/t5/P-Series/P2041RDB-PCIe-Problem-vxWorks/m-p/284944#M940</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have the p2041rdb Borad.&lt;/P&gt;&lt;P&gt;I got the vxWorks BSP from the WindRiber site.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I read a target.ref file. then compiled the bootrom and kernel.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I can the Tffs, SATA, ..&lt;/P&gt;&lt;P&gt;but I can't Pcie.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;shell log -&amp;gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;****************************************************************************************************************************************&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;vxBusShow&lt;/P&gt;&lt;P&gt;Registered Bus Types:&lt;/P&gt;&lt;P&gt;&amp;nbsp; MII_Bus @ 0x002eb1ec&lt;/P&gt;&lt;P&gt;&amp;nbsp; PCI_Bus @ 0x002eae5c&lt;/P&gt;&lt;P&gt;&amp;nbsp; PLB_Bus @ 0x002eae78&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Registered Device Drivers:&lt;/P&gt;&lt;P&gt;&amp;nbsp; ppcIntCtlr at 0x002e92c4 on bus PLB_Bus, funcs @ 0x002e92b8&lt;/P&gt;&lt;P&gt;&amp;nbsp; m85xxTimerDev at 0x002eada8 on bus PLB_Bus, funcs @ 0x002ead8c&lt;/P&gt;&lt;P&gt;&amp;nbsp; fslSata at 0x002eb2f8 on bus PLB_Bus, funcs @ 0x002eb2e0&lt;/P&gt;&lt;P&gt;&amp;nbsp; fslDma at 0x002e9f28 on bus PLB_Bus, funcs @ 0x002e9f1c&lt;/P&gt;&lt;P&gt;&amp;nbsp; epic at 0x002ea0bc on bus PLB_Bus, funcs @ 0x002ea068&lt;/P&gt;&lt;P&gt;&amp;nbsp; dtsec at 0x002eb0d0 on bus PLB_Bus, funcs @ 0x002eb000&lt;/P&gt;&lt;P&gt;&amp;nbsp; ns16550 at 0x002ea4a8 on bus PLB_Bus, funcs @ 0x002ea3d8&lt;/P&gt;&lt;P&gt;&amp;nbsp; ns16550 at 0x002ea460 on bus PCI_Bus, funcs @ 0x002ea3d8&lt;/P&gt;&lt;P&gt;&amp;nbsp; dtsecMdio at 0x002eb2a0 on bus PLB_Bus, funcs @ 0x002eb274&lt;/P&gt;&lt;P&gt;&amp;nbsp; genericPhy at 0x002eb234 on bus MII_Bus, funcs @ 0x002eb228&lt;/P&gt;&lt;P&gt;&amp;nbsp; miiBus at 0x002eb1a4 on bus PCI_Bus, funcs @ 0x002eb148&lt;/P&gt;&lt;P&gt;&amp;nbsp; miiBus at 0x002eb164 on bus PLB_Bus, funcs @ 0x002eb148&lt;/P&gt;&lt;P&gt;&amp;nbsp; m85xxPci at 0x002e9e38 on bus PLB_Bus, funcs @ 0x002e9e2c&lt;/P&gt;&lt;P&gt;&amp;nbsp; m85xxCCSR at 0x002ea134 on bus PLB_Bus, funcs @ 0x002ea128&lt;/P&gt;&lt;P&gt;&amp;nbsp; QorIQFman at 0x002ea270 on bus PLB_Bus, funcs @ 0x002ea254&lt;/P&gt;&lt;P&gt;&amp;nbsp; QorIQBman at 0x002ea214 on bus PLB_Bus, funcs @ 0x002ea1f8&lt;/P&gt;&lt;P&gt;&amp;nbsp; fslGpio at 0x002ea1b8 on bus PLB_Bus, funcs @ 0x002ea19c&lt;/P&gt;&lt;P&gt;&amp;nbsp; QorIQQman at 0x002ea350 on bus PLB_Bus, funcs @ 0x002ea32c&lt;/P&gt;&lt;P&gt;&amp;nbsp; QorIQPciEx at 0x002e9edc on bus PLB_Bus, funcs @ 0x002e9e78&lt;/P&gt;&lt;P&gt;&amp;nbsp; QorIQLaw at 0x002ea2ec on bus PLB_Bus, funcs @ 0x002ea2b0&lt;/P&gt;&lt;P&gt;&amp;nbsp; plbCtlr at 0x002eaea0 on bus PLB_Bus, funcs @ 0x002eae94&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Busses and Devices Present:&lt;/P&gt;&lt;P&gt;&amp;nbsp; PLB_Bus @ 0x002fe368 with bridge @ 0x002eaee0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Device Instances:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ppcIntCtlr unit 0 on PLB_Bus @ 0x002ff328 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; epic unit 0 on PLB_Bus @ 0x002ff428 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ns16550 unit 0 on PLB_Bus @ 0x002ff628 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ns16550 unit 1 on PLB_Bus @ 0x002ff828 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ns16550 unit 2 on PLB_Bus @ 0x002ffa28 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ns16550 unit 3 on PLB_Bus @ 0x002ffc28 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; fslGpio unit 0 on PLB_Bus @ 0x002ffe28 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; QorIQLaw unit 0 on PLB_Bus @ 0x002fff28 with busInfo 0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; QorIQBman unit 0 on PLB_Bus @ 0x00300028 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; QorIQQman unit 0 on PLB_Bus @ 0x00300128 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; QorIQFman unit 0 on PLB_Bus @ 0x00300228 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; QorIQPciEx unit 1 on PLB_Bus @ 0x0030d328 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; dtsec unit 0 on PLB_Bus @ 0x0030d628 with busInfo 0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; dtsec unit 1 on PLB_Bus @ 0x0030d728 with busInfo 0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; dtsec unit 2 on PLB_Bus @ 0x0030d828 with busInfo 0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; dtsec unit 3 on PLB_Bus @ 0x0030d928 with busInfo 0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; dtsec unit 4 on PLB_Bus @ 0x0030da28 with busInfo 0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; dtsecMdio unit 0 on PLB_Bus @ 0x0030db28 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; m85xxTimerDev unit 0 on PLB_Bus @ 0x0030dc28 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; fslSata unit 0 on PLB_Bus @ 0x0030dd28 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; fslSata unit 1 on PLB_Bus @ 0x0030de28 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; fslDma unit 0 on PLB_Bus @ 0x0030df28 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; fslDma unit 1 on PLB_Bus @ 0x0030e028 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; miiBus unit 0 on PLB_Bus @ 0x0030e128 with busInfo 0x002fefa8&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; miiBus unit 1 on PLB_Bus @ 0x00312328 with busInfo 0x002fef68&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; miiBus unit 2 on PLB_Bus @ 0x00312528 with busInfo 0x002fefe8&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; miiBus unit 3 on PLB_Bus @ 0x00312728 with busInfo 0x002ff028&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; miiBus unit 4 on PLB_Bus @ 0x00312928 with busInfo 0x002ff068&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Orphan Devices:&lt;/P&gt;&lt;P&gt;&amp;nbsp; MII_Bus @ 0x002fefa8 with bridge @ 0x0030e128&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Device Instances:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; genericPhy unit 0 on MII_Bus @ 0x0030e228 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Orphan Devices:&lt;/P&gt;&lt;P&gt;&amp;nbsp; MII_Bus @ 0x002fef68 with bridge @ 0x00312328&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Device Instances:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; genericPhy unit 1 on MII_Bus @ 0x00312428 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Orphan Devices:&lt;/P&gt;&lt;P&gt;&amp;nbsp; MII_Bus @ 0x002fefe8 with bridge @ 0x00312528&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Device Instances:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; genericPhy unit 2 on MII_Bus @ 0x00312628 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Orphan Devices:&lt;/P&gt;&lt;P&gt;&amp;nbsp; MII_Bus @ 0x002ff028 with bridge @ 0x00312728&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Device Instances:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; genericPhy unit 3 on MII_Bus @ 0x00312828 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Orphan Devices:&lt;/P&gt;&lt;P&gt;&amp;nbsp; MII_Bus @ 0x002ff068 with bridge @ 0x00312928&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Device Instances:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; genericPhy unit 4 on MII_Bus @ 0x00312a28 with busInfo 0x00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Orphan Devices:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;value = 1 = 0x1&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-&amp;gt; pciDeviceShow&lt;/P&gt;&lt;P&gt;value = -1 = 0xffffffff&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;****************************************************************************************************************************************&lt;/P&gt;&lt;P&gt;I used rcw file that rcw_5g_1500mhz.bin (RR_PH_0x19)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Oct 2013 05:22:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/P2041RDB-PCIe-Problem-vxWorks/m-p/284944#M940</guid>
      <dc:creator>kohyungeun</dc:creator>
      <dc:date>2013-10-17T05:22:18Z</dc:date>
    </item>
    <item>
      <title>Re: P2041RDB PCIe Problem . (vxWorks)</title>
      <link>https://community.nxp.com/t5/P-Series/P2041RDB-PCIe-Problem-vxWorks/m-p/284945#M941</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you use a custom board? If not, why don't you use SDK 1.4 which is available on &lt;A href="http://www.freescale.com/webapp/search/Serp.jsp?QueryText=qoriq+sdk+1.4&amp;amp;assetIdResult=&amp;amp;attempt=1&amp;amp;lastQueryText=sdk+1.4&amp;amp;isFromFlex=false&amp;amp;getResult=false&amp;amp;assetLockedForNavigation=false&amp;amp;iteration=1&amp;amp;fsrch=1&amp;amp;isComparison=false&amp;amp;showAllCategories=false&amp;amp;sessionChecker=Kl-37Rx%2BGW73Xt2KRbY9wqc9.ebiz_ms1&amp;amp;getTree=false&amp;amp;fromTrng=false&amp;amp;fromPSP=false&amp;amp;getFilter=false&amp;amp;assetLocked=false&amp;amp;fromCust=false&amp;amp;showCustomCollateral=false&amp;amp;RELEVANCE=true&amp;amp;SelectedAsset=Downloads&amp;amp;fromWebPages=false&amp;amp;fromASP=false&amp;amp;fromMobile=false&amp;amp;isAdvanceSearch=false&amp;amp;isTree=false&amp;amp;fromDAP=false&amp;amp;isResult=false"&gt;freescale.com&lt;/A&gt;. Also, you rcw file set PCIe on Slot1 and according with P2041 reference manual, your application should use PCIe2 controller for communication with PCIe device.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SerDes 0x19 -&amp;gt; Bank 1 C: SGMII1, D: SGMII2, E,F: PCIe2, G: SGMII3, H: SGMII4 &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Adrian &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 18 Oct 2013 12:58:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/P2041RDB-PCIe-Problem-vxWorks/m-p/284945#M941</guid>
      <dc:creator>addiyi</dc:creator>
      <dc:date>2013-10-18T12:58:18Z</dc:date>
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