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    <title>topic Re: Initialization (.cfg) file by using CW and CW-TAP in P-Series</title>
    <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282861#M895</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Ok, now I understand. CodeWarrior doen't support any custom board for a specific processor.&lt;/P&gt;&lt;P&gt;So, you tried with the sram init file as Yiping suggested above? It's the only way to get rid of this SAP error.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Secondly, you can try to use the DDR Validation 1.3.0 (this is a powerful tool that can be used with CW and PEx for finding your custom DDR settings).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Marius&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 14 Jun 2013 16:53:10 GMT</pubDate>
    <dc:creator>marius_grigoras</dc:creator>
    <dc:date>2013-06-14T16:53:10Z</dc:date>
    <item>
      <title>Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282851#M885</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using CW to bring up the P2010 chip on a custom board.&lt;/P&gt;&lt;P&gt;I am using a target initialization file (.cfg file) and the first lines of the file are:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writemem.l 0xFF720000 0xB0010000 #enable L2 as SRAM&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writemem.l 0xFF720100 0xFFF00000 #set L2 SR BAR&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writemem.l 0xFFFFF000 0x48000000 #instruction at debug interrupt&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writemem.l 0xFFFFF700 0x48000000 #instruction at program interrupt&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writemem.l 0xFFFFFFFC 0x48000000 #instruction at reset vector&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;# set interrupt vectors&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writereg IVPR 0xFFFF0000 # IVPR (pointing to L2 SRAM location)&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writereg IVOR15 0x0000F000 # debug - (a valid instruction should exist to be fetched)&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writereg IVOR6 0x0000F700 # program&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;#######################################################################&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;# Set a breakpoint at the reset address &lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writereg IAC1 0xfffffffc&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writereg DBCR0 0x40800000&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writereg DBCR1 0x00000000&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writereg MSR 0x02000200&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;writemem.l 0xFF701010 0x03010000 #enable CPU0 and CPU1&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;run&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;sleep 0x10&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;stop&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have enabled the CCS logging in the CW and the error-output is:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;ccs_write_mem&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;&amp;nbsp; coreh = [serverh:0;cc_index:0;chain_pos:0]&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;&amp;nbsp; addr = [space:0;size:4;address:0xff720000]&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;&amp;nbsp; data: (size = 4)&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;&amp;nbsp; B0010000&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;&amp;nbsp; ccs_write_mem; ccs_error = -2147483641; duration=30 ms&lt;/EM&gt;&lt;/P&gt;&lt;P style="padding-left: 60px;"&gt;&lt;EM&gt;&amp;nbsp; Error message: SAP error&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It seems that the error is occurred at the first line of the .cfg file. CW and CW-TAP cannot execute the writemem.l command in the .cfg file.&lt;/P&gt;&lt;P&gt;I would appreciate any idea/clue about the problem. My jtag chain file configuration is &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="text-align: justify; padding-left: 60px;"&gt;&lt;EM&gt;P2010 (2 0)&lt;/EM&gt;&lt;/P&gt;&lt;P style="text-align: justify; padding-left: 60px;"&gt;&lt;EM&gt;Generic 10 1 0x3FF &lt;/EM&gt;&lt;/P&gt;&lt;P style="text-align: justify; padding-left: 60px;"&gt;&lt;EM&gt;Generic&amp;nbsp; 8 1 0xFF &lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Apr 2013 12:47:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282851#M885</guid>
      <dc:creator>esode</dc:creator>
      <dc:date>2013-04-24T12:47:28Z</dc:date>
    </item>
    <item>
      <title>Re: Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282852#M886</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Maybe you can check your pin status during reset according to Hardware Specification document including footnote. Also, you seem to write a reserved value into L2CTL[L2SIZ] field, I am not sure whether this will affect, try to change the value from "&lt;EM&gt;B0010000&lt;/EM&gt;" to "A&lt;EM&gt;0010000&lt;/EM&gt;".&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Jun 2013 10:03:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282852#M886</guid>
      <dc:creator>lunminliang</dc:creator>
      <dc:date>2013-06-07T10:03:42Z</dc:date>
    </item>
    <item>
      <title>Re: Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282853#M887</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What CW and CW-TAP versions are you using?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Marius&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Jun 2013 10:12:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282853#M887</guid>
      <dc:creator>marius_grigoras</dc:creator>
      <dc:date>2013-06-07T10:12:20Z</dc:date>
    </item>
    <item>
      <title>Re: Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282854#M888</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please refer to &amp;lt;CodeWarrior install folder&amp;gt;\PowerPC_EABI_Support\Initialization_Files\QorIQ_P2\P2010DS_init_sram_flash.cfg.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 09 Jun 2013 09:15:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282854#M888</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2013-06-09T09:15:31Z</dc:date>
    </item>
    <item>
      <title>Re: Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282855#M889</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Actually I used CW and gdb to bring up the P2010 on our board.&lt;/P&gt;&lt;P&gt;The gdb works now after Freescale provided a new firmfare for the TAP for P2010 and init.gdb files for p2010. I can initialize and execute a .elf file on the P2010 now. This shows us that our board is ok as hardware. &lt;/P&gt;&lt;P&gt;However, there is still problem on CW side. I open a project for the same board and I only try to connect to the p2010.&lt;/P&gt;&lt;P&gt;Then, I debug; I see that I can read/write on the core registers, however there is a problem for&amp;nbsp; memory mapped registers. Those registers are not reachable. I opened a ccs log on CW and generally we get this error:&lt;/P&gt;&lt;P&gt;"Error message: cannot start SAP transaction". &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;CW version is 10.3. And I think the TAP version is below: &lt;/P&gt;&lt;P&gt;(bin) 61 % show cc&lt;/P&gt;&lt;P&gt;0: CodeWarrior TAP (cwtap:192.168.1.131) CC software ver. {0.0}&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Jun 2013 10:39:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282855#M889</guid>
      <dc:creator>esode</dc:creator>
      <dc:date>2013-06-14T10:39:00Z</dc:date>
    </item>
    <item>
      <title>Re: Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282856#M890</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The CWTAP version is here:&lt;/P&gt;&lt;P&gt;(bin) 61 % show version&lt;/P&gt;&lt;P&gt;CCS Linux Release Build 365p0&lt;/P&gt;&lt;P&gt;CodeWarrior Connection Server version {4.13}&lt;/P&gt;&lt;P&gt;(C) Copyright 2003-2010 Freescale Semiconductor, Inc. ALL RIGHTS RESERVED&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Jun 2013 10:40:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282856#M890</guid>
      <dc:creator>esode</dc:creator>
      <dc:date>2013-06-14T10:40:59Z</dc:date>
    </item>
    <item>
      <title>Re: Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282857#M891</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I attached the log of the ccs command in the CW. Please take a look at the .txt file. &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Jun 2013 10:43:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282857#M891</guid>
      <dc:creator>esode</dc:creator>
      <dc:date>2013-06-14T10:43:31Z</dc:date>
    </item>
    <item>
      <title>Re: Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282858#M892</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I just took a look on the log file and it seems that you're getting a SAP error just at the first read_mem access (this is after reset procedure).&lt;/P&gt;&lt;P&gt;It seems to be a problem with config_chain; I have 2 questions here:&lt;/P&gt;&lt;P&gt;1. Are you sure that the DIP SW settings are for P2010 personality and not for P2020?&lt;/P&gt;&lt;P&gt;2. Are you sure that you're using a P2010 project and not a P2020 one?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Marius&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Jun 2013 11:30:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282858#M892</guid>
      <dc:creator>marius_grigoras</dc:creator>
      <dc:date>2013-06-14T11:30:38Z</dc:date>
    </item>
    <item>
      <title>Re: Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282859#M893</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Actually, in our earlier steps, some problems were due to hardware. I believe that we solved hardware related problems. Because, we can bring up the chip(p2010) by using gdb debugging tools. &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Jun 2013 11:46:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282859#M893</guid>
      <dc:creator>esode</dc:creator>
      <dc:date>2013-06-14T11:46:55Z</dc:date>
    </item>
    <item>
      <title>Re: Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282860#M894</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes, you are right about the SAP error when first reading. Here are my answers:&lt;/P&gt;&lt;P&gt;1) Our board is custom board, not a FreeScale demo board. And, we are sure that JTAG configuration is correct in CW.&lt;/P&gt;&lt;P&gt;And,&amp;nbsp; by looking the log file you may see that CW finds 3 chips(one of them is p2010) on the jtag chain.&lt;/P&gt;&lt;P&gt;2) Yes, I am sure that I create my project for p2010 when using CW's new project wizard. It is a bare metal project.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sincerely,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Jun 2013 16:18:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282860#M894</guid>
      <dc:creator>esode</dc:creator>
      <dc:date>2013-06-14T16:18:19Z</dc:date>
    </item>
    <item>
      <title>Re: Initialization (.cfg) file by using CW and CW-TAP</title>
      <link>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282861#M895</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Ok, now I understand. CodeWarrior doen't support any custom board for a specific processor.&lt;/P&gt;&lt;P&gt;So, you tried with the sram init file as Yiping suggested above? It's the only way to get rid of this SAP error.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Secondly, you can try to use the DDR Validation 1.3.0 (this is a powerful tool that can be used with CW and PEx for finding your custom DDR settings).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Marius&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Jun 2013 16:53:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Initialization-cfg-file-by-using-CW-and-CW-TAP/m-p/282861#M895</guid>
      <dc:creator>marius_grigoras</dc:creator>
      <dc:date>2013-06-14T16:53:10Z</dc:date>
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