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    <title>P-SeriesのトピックRe: How to boot P1022 u-boot into internal SRAM</title>
    <link>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264602#M686</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please refer to P2020DS.h to add L2 Cache configuration as the following.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_INIT_L2_ADDR&amp;gt;&amp;gt;---0xf8f80000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #ifdef CONFIG_PHYS_64BIT&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_INIT_L2_ADDR_PHYS&amp;gt;---0xff8f80000ull&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #else&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_INIT_L2_ADDR_PHYS&amp;gt;---CONFIG_SYS_INIT_L2_ADDR&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #endif&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_L2_SIZE&amp;gt;-&amp;gt;---(512 &amp;lt;&amp;lt; 10)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_INIT_L2_END&amp;gt;-(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_CCSRBAR&amp;gt;-&amp;gt;---0xffe00000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_CCSRBAR_PHYS_LOW&amp;gt;CONFIG_SYS_CCSRBAR&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 13 Nov 2013 11:43:31 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2013-11-13T11:43:31Z</dc:date>
    <item>
      <title>How to boot P1022 u-boot into internal SRAM</title>
      <link>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264601#M685</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm attempting to build a u-boot version for P1022 that will boot into SRAM, so that it can discover and configure any installed DIMM. I'm concerned that the standard boot file (config_ddr3_2gb_p1022ds.dat) won't work reliably on a machine fitted with a smaller or slower DIMM.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've found and fixed the following problems, but there are more remaining. Has anybody got a configuration like this to work?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. The config_sram_p1022ds.dat file sets the boot vector to f8f80000, rather than f8fff000 used in config_sram_p2020ds.dat&lt;/P&gt;&lt;P&gt;2. The u-boot config file for the P1022DS in SD boot mode sets TEXT_BASE to 0x11000000, rather than the 0xf8f80000 used in P2020DS.h&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My config file:&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;040:424f4f54&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Boot signature&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;044:00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;048:00080000&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Image size - should be overridden by boot-format&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;04c:00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;050:00001000&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Image location on SD card - should be overridden by boot-format&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;054:00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;058:f8f80000&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM address of image&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;05c:00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;060:&lt;STRONG&gt;f8fff000&lt;/STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Start vector&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;064:00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;068:00000006&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Config size&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;080:ff720100&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Set L2SRAM to f8f80000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;084:f8f80000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;088:ff720e44&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Disable L2 cache ECC errors&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;08c:0000000c&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;090:ff720000&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Enable L2 as all SRAM&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;094:80010000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;098:ff72e40c&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Set RD_SAFE on SDHC controller&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;09c:00000040&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;0a0:40000001&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Delay 0x100 instruction&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;0a4:00000100&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;0a8:80000001&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; End configuration&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;0ac:80000001&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My modified u-boot config section:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#ifdef CONFIG_SDCARD&lt;/P&gt;&lt;P&gt;#define CONFIG_RAMBOOT_SDCARD&lt;/P&gt;&lt;P&gt;#define CONFIG_SYS_RAMBOOT&lt;/P&gt;&lt;P&gt;#define CONFIG_SYS_EXTRA_ENV_RELOC&lt;/P&gt;&lt;P&gt;#define CONFIG_SYS_TEXT_BASE 0xf8f80000&lt;/P&gt;&lt;P&gt;#define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc&lt;/P&gt;&lt;P&gt;#endif&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Nov 2013 15:51:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264601#M685</guid>
      <dc:creator>adriancox</dc:creator>
      <dc:date>2013-11-07T15:51:08Z</dc:date>
    </item>
    <item>
      <title>Re: How to boot P1022 u-boot into internal SRAM</title>
      <link>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264602#M686</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please refer to P2020DS.h to add L2 Cache configuration as the following.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_INIT_L2_ADDR&amp;gt;&amp;gt;---0xf8f80000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #ifdef CONFIG_PHYS_64BIT&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_INIT_L2_ADDR_PHYS&amp;gt;---0xff8f80000ull&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #else&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_INIT_L2_ADDR_PHYS&amp;gt;---CONFIG_SYS_INIT_L2_ADDR&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #endif&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_L2_SIZE&amp;gt;-&amp;gt;---(512 &amp;lt;&amp;lt; 10)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_INIT_L2_END&amp;gt;-(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_CCSRBAR&amp;gt;-&amp;gt;---0xffe00000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define CONFIG_SYS_CCSRBAR_PHYS_LOW&amp;gt;CONFIG_SYS_CCSRBAR&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 Nov 2013 11:43:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264602#M686</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2013-11-13T11:43:31Z</dc:date>
    </item>
    <item>
      <title>Re: How to boot P1022 u-boot into internal SRAM</title>
      <link>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264603#M687</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;L2 Cache size of P1022&amp;nbsp; is 256K, but P2020's is 512K, P1022 L2 Cache for SRAM cannot accommodate the whole u-boot Image. &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Nov 2013 01:40:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264603#M687</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2013-11-14T01:40:47Z</dc:date>
    </item>
    <item>
      <title>Re: How to boot P1022 u-boot into internal SRAM</title>
      <link>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264604#M688</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks - I've had a go at trimming out u-boot features, but I can't get one small enough that's useful in my environment.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;t looks like I'll need to get the SPL support working for SD card booting.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Nov 2013 13:18:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264604#M688</guid>
      <dc:creator>adriancox</dc:creator>
      <dc:date>2013-11-14T13:18:41Z</dc:date>
    </item>
    <item>
      <title>Re: How to boot P1022 u-boot into internal SRAM</title>
      <link>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264605#M689</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Check out the latest upstream U-Boot (especially commit 7c8eea59b8c3b124d23b41f887bc525cf2adec30), which supports SPL for SD on P1022DS, with DDR SPD support.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 Nov 2013 23:17:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264605#M689</guid>
      <dc:creator>scottwood</dc:creator>
      <dc:date>2013-11-19T23:17:12Z</dc:date>
    </item>
    <item>
      <title>Re: How to boot P1022 u-boot into internal SRAM</title>
      <link>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264606#M690</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Have a look at the &lt;SPAN style="color: #000000; font-family: monospace; font-size: 12px;"&gt;controlcenterd_TRAILBLAZER&lt;/SPAN&gt; board configuration. It's a trimmed u-boot configuration (not SPL) that does what you asked for.&lt;/P&gt;&lt;P&gt;This is our config file for booting to SRAM:&lt;/P&gt;&lt;P&gt;40:424f4f54&lt;/P&gt;&lt;P&gt;44:00000000&lt;/P&gt;&lt;P&gt;48:00040000&lt;/P&gt;&lt;P&gt;4c:00000000&lt;/P&gt;&lt;P&gt;50:00000400&lt;/P&gt;&lt;P&gt;54:00000000&lt;/P&gt;&lt;P&gt;58:f8fc0000&lt;/P&gt;&lt;P&gt;5c:00000000&lt;/P&gt;&lt;P&gt;60:f8fff000&lt;/P&gt;&lt;P&gt;64:00000000&lt;/P&gt;&lt;P&gt;68:00000006&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;80:ff720100&lt;/P&gt;&lt;P&gt;84:f8fc0000&lt;/P&gt;&lt;P&gt;88:ff720e44&lt;/P&gt;&lt;P&gt;8c:0000000c&lt;/P&gt;&lt;P&gt;90:ff720000&lt;/P&gt;&lt;P&gt;94:80010000&lt;/P&gt;&lt;P&gt;98:ff72e40c&lt;/P&gt;&lt;P&gt;9c:00000040&lt;/P&gt;&lt;P&gt;a0:40000001&lt;/P&gt;&lt;P&gt;a4:00000100&lt;/P&gt;&lt;P&gt;a8:80000001&lt;/P&gt;&lt;P&gt;ac:80000001&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 17 Dec 2013 14:51:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/How-to-boot-P1022-u-boot-into-internal-SRAM/m-p/264606#M690</guid>
      <dc:creator>dirkeibach</dc:creator>
      <dc:date>2013-12-17T14:51:07Z</dc:date>
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