p2040 power sequencing

dickginther — Tue, 28 May 2013 20:33:11 GMT

The sequencing for the P2040 states that:

1. Bring up OVDD (3V3), LVDD (2V5), BVDD (3V3), CVDD (3V3), USB_VDD_3P3 (3V3)

2. Bring up VDD_CA_CB_PL (1V0), SVDD (1V0), AVDD (1V0), USB_VDD_1P0 (1V0)

3. Bring up GVDD (1.35V) and XVDD (1V5)

So step 1 has the 2.5V coming up the same time as the 3.3V. The sequence would be: 3.3V/2.5V -> 1V -> 1.35V/1.5V. However the sequence for the P4080 evaluation board schematic shows the 2.5V coming up after the 3.3V (although the notes say "3.3V & 2.5V --->1.0V--->1.5V---->RST"), so does that suggest that the 2.5V delay after 3.3V is OK?

Re: p2040 power sequencing

lunminliang — Wed, 29 May 2013 07:55:12 GMT

I think items in the same section have no ordering requirement with respect to one another.

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p2040 power sequencing

Re: p2040 power sequencing