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    <title>topic Re: P1014 - memory throughput in P-Series</title>
    <link>https://community.nxp.com/t5/P-Series/P1014-memory-throughput/m-p/1843336#M5189</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Please note that the DDR subsystem throughput is highly-dependent on the application accessing the SDRAM.&lt;BR /&gt;This is why there is no measured DDR3 throughput numbers.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;
&lt;P&gt;BR.&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 09 Apr 2024 18:37:09 GMT</pubDate>
    <dc:creator>Oswalag</dc:creator>
    <dc:date>2024-04-09T18:37:09Z</dc:date>
    <item>
      <title>P1014 - memory throughput</title>
      <link>https://community.nxp.com/t5/P-Series/P1014-memory-throughput/m-p/1834647#M5188</link>
      <description>&lt;P&gt;Hey,&lt;/P&gt;&lt;P&gt;I'm well aware that P1014 is a really old platform, but I'm doing some hobby work with it for fun.&lt;/P&gt;&lt;P&gt;My setup:&lt;BR /&gt;SYSCLK: 66.666 MHz&lt;BR /&gt;CCB clock: 400 MHz (6:1 CCB:SYSCLK)&lt;BR /&gt;Core clock: 800 MHz (2:1 e500:CCB)&lt;BR /&gt;DDR3 (non-L), 16bit: 333MHz / 667 MT/s (10:1)&lt;/P&gt;&lt;P&gt;800 MHz core/L1 * 32bit accesses = 3200 MByte/s theoretical&lt;BR /&gt;400 MHz CCB/L2 * 32bit accesses = 1600 MByte/s theoretical&lt;BR /&gt;333MHz / 667 MT/s DDR3 * 16bit accesses = 1333 MByte/s theoretical&lt;/P&gt;&lt;P&gt;I measured the following memory throughputs:&lt;/P&gt;&lt;P&gt;L1 cache: 2900 MByte/s (90% of the theoretical max)&lt;BR /&gt;L2 cache: 1350 MByte/s (84% of the theoretical max)&lt;BR /&gt;DDR3: 600 MByte/s (50% of the theoretical max)&lt;/P&gt;&lt;P&gt;I'm aware that the DDR3 is probably not going to perform better than the L2 cache, but I'm still surprised. L1 and L2 performance looks totally fine, but the DDR3 performance seems to be pretty low.&lt;/P&gt;&lt;P&gt;Other platforms with 16bit DDR3-667 RAM get 800 MByte/s real world throughput.&lt;/P&gt;&lt;P&gt;Does anyone happen to have benchmark results from a P1010 or P1014 platform? What DDR speeds did you see/would be expected?&lt;/P&gt;&lt;P&gt;Thanks&lt;BR /&gt;Manawyrm&lt;/P&gt;</description>
      <pubDate>Mon, 25 Mar 2024 16:41:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/P1014-memory-throughput/m-p/1834647#M5188</guid>
      <dc:creator>Manawyrm</dc:creator>
      <dc:date>2024-03-25T16:41:11Z</dc:date>
    </item>
    <item>
      <title>Re: P1014 - memory throughput</title>
      <link>https://community.nxp.com/t5/P-Series/P1014-memory-throughput/m-p/1843336#M5189</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Please note that the DDR subsystem throughput is highly-dependent on the application accessing the SDRAM.&lt;BR /&gt;This is why there is no measured DDR3 throughput numbers.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;
&lt;P&gt;BR.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 09 Apr 2024 18:37:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/P1014-memory-throughput/m-p/1843336#M5189</guid>
      <dc:creator>Oswalag</dc:creator>
      <dc:date>2024-04-09T18:37:09Z</dc:date>
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