topic Re: P1021 cache-inhibited? in P-Series https://community.nxp.com/t5/P-Series/P1021-cache-inhibited/m-p/782213#M4475 <HTML><HEAD></HEAD><BODY><P>Corresponding MMU TLB has to have I and G bits set - please refer to the PowerPC™ e500 Core Family Reference Manual, 12.3.6 TLB Entry Field Definitions:</P><P><A class="link-titled" href="https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf" title="https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf">https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf</A>&nbsp;</P></BODY></HTML> Wed, 21 Nov 2018 05:49:00 GMT ufedor 2018-11-21T05:49:00Z P1021 cache-inhibited? https://community.nxp.com/t5/P-Series/P1021-cache-inhibited/m-p/782212#M4474 <HTML><HEAD></HEAD><BODY><P>I'm working with the P1021.&nbsp; The Reference Manual states that if CCSR space is used, then it should be marked as cache-inhibited and guard.</P><P><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/78065iADFFFBD2F49A3ABC/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /></span></P><P>How do I mark this address space, or any other address space as cache-inhibited and guarded?</P></BODY></HTML> Tue, 20 Nov 2018 17:01:37 GMT https://community.nxp.com/t5/P-Series/P1021-cache-inhibited/m-p/782212#M4474 zwilcox 2018-11-20T17:01:37Z Re: P1021 cache-inhibited? https://community.nxp.com/t5/P-Series/P1021-cache-inhibited/m-p/782213#M4475 <HTML><HEAD></HEAD><BODY><P>Corresponding MMU TLB has to have I and G bits set - please refer to the PowerPC™ e500 Core Family Reference Manual, 12.3.6 TLB Entry Field Definitions:</P><P><A class="link-titled" href="https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf" title="https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf">https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf</A>&nbsp;</P></BODY></HTML> Wed, 21 Nov 2018 05:49:00 GMT https://community.nxp.com/t5/P-Series/P1021-cache-inhibited/m-p/782213#M4475 ufedor 2018-11-21T05:49:00Z Re: P1021 cache-inhibited? https://community.nxp.com/t5/P-Series/P1021-cache-inhibited/m-p/782214#M4476 <HTML><HEAD></HEAD><BODY><P>Thank you sir.</P></BODY></HTML> Wed, 21 Nov 2018 13:57:22 GMT https://community.nxp.com/t5/P-Series/P1021-cache-inhibited/m-p/782214#M4476 zwilcox 2018-11-21T13:57:22Z