topic QCVS-DDRV passed but Linux kernel crash ? in P-Series

QCVS-DDRV passed but Linux kernel crash ?

stefanvranken — Mon, 04 Sep 2017 12:43:19 GMT

Hello,

My board has P2020 with 1GByte discrete ddr3 (4 sdrams* 128Mx16). We now have 30 boards of which 3 show unstable behaviour: uboot ok but linux crashes due to kernel oops (bus-, paging-, segmentation- errors) indicating unstable instruction fetches from ddr3.

With Codewarrior-tap I ran DDRValidation tool on these 3 boards and all 3 are validated ok: ddr operational testing of full 1GByte does not show errors. However, running linux from ddr3 is unstable ?
P2020 DDR data rate = 666.66 Mbps (ddrclkin=66,666 Mhz*10) >> ddr_mck = 333.33 Mhz
On one board I changed this to 600 Mbps datarate (ddrclkin=100M*6) >> ddr_mck = 300 Mhz but stays unstable.

Could it be that some ddr3-sdram configuration parameter is causing trouble if fast consecutive burst accesses (linux, dual core) , while cw-tap-ddrv access is less stringent ?

Kind Regards

Stefan

Re: QCVS-DDRV passed but Linux kernel crash ?

ufedor — Thu, 12 Oct 2017 14:28:48 GMT

It will be more convenient if you create a Technical Case to investigate the issue:

https://community.freescale.com/thread/381898

Re: QCVS-DDRV passed but Linux kernel crash ?

stefanvranken — Fri, 03 Nov 2017 10:18:56 GMT

Case 00139557

Re: QCVS-DDRV passed but Linux kernel crash ?

stefanvranken — Thu, 07 Dec 2017 09:00:32 GMT

In the mean time I have discovered one ddr-controller-parameter that can make my unstable protos good.

This new setting is now under test on all prototypes but this is definitely a better ddr-controller setting for my boards.

You can add next info to the ticket.

parameter “timing_cfg1[29:31 wrtord]”

tWTR min = greater of 4CK or 7.5ns (Micron datasheet & CK=333Mhz_3.0ns)

WRTORD = 4CK min <<<<

WRTORD = (tWTR+2cycles) if ddr_sdram_cfg2[OBC_CFG]=1 >> tWTR min = 4+2=6

“OBC: On_the_fly_Burst_chop” is not used >> parameter WRTORD = 4 (in my old reg-settings). <<< Correction 4jan18: OBC=on, explaining unstability

As soon as I make WRTORD > 4 , the unstable protos become stable.

To create max margin max setting 7 ck is used.

#define CONFIG_SYS_DDR_TIMING_1 0xBCBBE747 /* caslat=6,wrrec=7,wtr=7 */

#define CONFIG_SYS_DDR_MODE_1 0x00041621 /* sdram:caslat=6,wrrec=7,Rtt=60,ods=half */