topic Re: PCIE INTx issue in P-Series

PCIE INTx issue

yinux — Mon, 21 Aug 2017 01:58:09 GMT

env: p2041--rc;
p1011-ep;

step:
1. p2041 connect the intx;
intConnect((VOIDFUNCPTR *) (0x2a), isrPCIE, 0);
intEnable(0x2a);
2. p1011 send intx message to 2041
p1011 mem32Addr=0xa0000000;
PEXOWAR0[WTT] = 0x5.
*(unsigned int*)0xa0000000 = 0x20040000;

3. p2041 cannot come int the isrPCIE ?
would you please give me some suggestions?

p2041--access the p1011 as follow:
vendor ID = 0x1957-
device ID = 0x0108
command register = 0x0006-
status register = 0x0010
revision ID = 0x11
class code = 0x0b
sub class code = 0x20
programming interface = 0x01
cache line = 0x10
latency time = 0x00
header type = 0x00
BIST = 0x00
base address 0 = 0xc4000000
base address 1 = 0xc0000008
base address 2 = 0xc4100004
base address 3 = 0x00000000
base address 4 = 0x00000000
base address 5 = 0x00000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x0000
sub system ID = 0x0000
expansion ROM base address = 0x00000000
interrupt line = 0x2a
interrupt pin = 0x01
min Grant = 0x00
max Latency = 0x00
Capabilities - Power Management
Capabilities - PCIe: Endpoint, IRQ 0
Device: Max Payload: 256 bytes, Extended Tag: 5-bit
Acceptable Latency: L0 - <64ns, L1 - <1us
Errors Enabled: Relaxed Ordering No Snoop
Max Read Request 512 bytes
Link: MAX Speed - 2.5Gb/s, MAX Width - by 4 Port - 0 ASPM - L0s
Latency: L0s - <2us, L1 - >64us
ASPM - Disabled, RCB - 64bytes
Speed - 2.5Gb/s, Width - by 1
Ext Capabilities - Advanced Error Reporting. 0x100. Version 1. AER Control: 0xa0
Uncorrectable : Mask 0x0. Severity 0x62010
Uncorrectable Status:
Correctable : Mask 0x0.
Correctable Status:
HeaderLog:
Error Source Identification: 0x0 0x0
Capabilities - Message Signaled Interrupts: 0x70 control 0x88 Disabled, 64-bit, MME: 0 MMC: 4
Address: 0000000000000000 Data: 0x0000
Per-vector Mask: Unsupported

value = 0 = 0x0

Re: PCIE INTx issue

ufedor — Mon, 21 Aug 2017 02:51:53 GMT

You wrote:

> *(unsigned int*)0xa0000000 = 0x20040000;

For the Assert_INTA message the operation should be:

*(unsigned int*)0xa0000000 = 0x8020;

Re: PCIE INTx issue

yinux — Mon, 21 Aug 2017 03:34:52 GMT

how to get the value?

For the Assert_INTA message the operation should be:

*(unsigned int*)0xa0000000 = 0x8020;

i send the message 0x8020, but the result is the same......

Re: PCIE INTx issue

ufedor — Mon, 21 Aug 2017 04:10:27 GMT

Message data[16-18] = Routing[2:0]

Message data[24-31] = Code[7:0]

INTA example:

Message data (big-endian, binary) = 0000_0000_0000_0000_1000_0000_0010_0000

> i send the message 0x8020, but the result is the same......

Check settings of the P2041 MPIC.

What are values of the GCR, CTPR0 and corresponding EIVPRn?

Which PCIe controller of the P2041 is used?

Re: PCIE INTx issue

yinux — Mon, 21 Aug 2017 06:54:22 GMT

thanks for your help.

p2041--pcie3 connect the p1011 pcie1.

P2041- Reg[gcr]=0x2000_0000; Reg[ctpr]=0x0000_0000; Reg[eivpr0]=0x80c0_0000;

follw the pcie information:

interrupt line = 0x2a
interrupt pin = 0x01

we use the inta interrupt, which is not the external interrupt.

Re: PCIE INTx issue

ufedor — Mon, 21 Aug 2017 07:25:54 GMT

> Reg[eivpr0]=0x80c0_0000;

This means that MSK=1 and PRIORITY=0.

Possible correct value can be 0x00410000.

Concerning the EIVPR0[P] value :

Note that it is possible to share IRQn and INTx if the external interrupt is level sensitive;
however, if an interrupt occurs, the interrupt service routine must poll both the external
sources connected to the IRQn input and the PCI Express INTx sources to determine
from which path the external interrupt came. In any case, IRQn should be pulled to the
negated state as determined by the associated polarity setting in EIVPRn[P].

Re: PCIE INTx issue

yinux — Mon, 21 Aug 2017 07:43:15 GMT

eivpr is External interrupt n (IRQn) vector/priority register.

we use the inta---which is internal interrupt.

intb\intc\intd is the eivpr.

i donot known how to work next step...

Can I modiy the INTA\intb\intc\intd mode? the regiser of p1011 header type0 interrupt_pin is read only?

Re: PCIE INTx issue

ufedor — Mon, 21 Aug 2017 07:48:53 GMT

Sorry, what is the IIVPR24 value?

Re: PCIE INTx issue

yinux — Mon, 21 Aug 2017 08:05:08 GMT

we use the 26 PCI Express 3 INTA.

reg[IIVPR-26]= 8080_0000;

when execute the intconnect ,then reg[IIVPR-26]= 0083_002a;

when p1011 send the msg 0x8020, the reg[IIVPR-26] of p2041 = 8083_002a;

Re: PCIE INTx issue

ufedor — Mon, 21 Aug 2017 08:13:50 GMT

> when execute the intconnect ,then reg[IIVPR-26]= 0083_002a;

This looks correct.

> when p1011 send the msg 0x8020, the reg[IIVPR-26] of p2041 = 8083_002a;

Why MSK is set? There will be no interrupt event in this case.

Re: PCIE INTx issue

yinux — Mon, 21 Aug 2017 08:17:16 GMT

> when p1011 send the msg 0x8020, the reg[IIVPR-26] of p2041 = 8083_002a;

Why MSK is set? There will be no interrupt event in this case.

I donot the reason. Does it means the p2041 has captured the msg 0x8020 from the p1011?

Re: PCIE INTx issue

ufedor — Mon, 21 Aug 2017 08:18:52 GMT

Yes, I think so.

Re: PCIE INTx issue

yinux — Mon, 21 Aug 2017 08:26:00 GMT

ok, Why MSK is set? why the p2041 canot come in the isr???? the msg is error?

Re: PCIE INTx issue

ufedor — Mon, 21 Aug 2017 08:28:31 GMT

Please debug the interrupt handler code.

Re: PCIE INTx issue

yinux — Mon, 21 Aug 2017 09:17:18 GMT

i read the register:

Reg[IILR-26]=0X0000_0000;

Reg[IIDR-26]=0x0000_0000;

does it meas p2041 cannot receive this interrupt.

how to debug the interrupt handler code? any suggestion , thanks very much.

Re: PCIE INTx issue

ufedor — Tue, 22 Aug 2017 16:33:18 GMT

Sorry, I'm hardware engineer.

Let's check that the INTA message is received.

You wrote:

> when execute the intconnect ,then reg[IIVPR-26]= 0083_002a;

Please modify the value to 0x0080_0000 and generate the INTA message.

What is the register value after that?

Re: PCIE INTx issue

yinux — Wed, 23 Aug 2017 01:57:17 GMT

thank for your great help.

1. p2041 execute the intconnect, then I modify the reg[IIVPR-26]=0080_0000;

2. p1011 send msg 0x8020;

3. p2041 check the reg[IIVPR-26] , the value is 0080_0000;

reg[IIDR-26]=0000_0001

reg[IILR-26]=0000_0000

reg[MCSR1]=0000_0000

reg[IRQSIESR1]=0000_0000

reg[IACK]=0000 00ff

it menas the p2041 does not recved the inta?

i donot known the reason....

Re: PCIE INTx issue

yinux — Wed, 23 Aug 2017 02:02:54 GMT

thank for your help.

1. p2041 execute the intconnect, then I modify the reg[IIVPR-26]=0080_0000;

2. p1011 send msg 0x8020;

3. p2041 check the reg[IIVPR-26] , the value is 0080_0000;

reg[IIDR-26]=0000_0001

reg[IILR-26]=0000_0000

reg[MCSR1]=0000_0000

reg[IRQSIESR1]=0000_0000

reg[IACK]=0000 00ff

it menas the p2041 does not recved the inta?

i donot known the reason....