topic PCI Express Controller Internal CSRs in P-Series https://community.nxp.com/t5/P-Series/PCI-Express-Controller-Internal-CSRs/m-p/669629#M4075 <HTML><HEAD></HEAD><BODY><P>In the manual P1022RM there is description of PCI Express Controller Internal CSRs at pci configuration 0x400 to 0x6FF .</P><P>Is there a public descriptions of that registers may it only be used for debug purpose.&nbsp;</P><P></P><P>Micha</P></BODY></HTML> Tue, 08 Aug 2017 14:42:47 GMT michayardeny 2017-08-08T14:42:47Z PCI Express Controller Internal CSRs https://community.nxp.com/t5/P-Series/PCI-Express-Controller-Internal-CSRs/m-p/669629#M4075 <HTML><HEAD></HEAD><BODY><P>In the manual P1022RM there is description of PCI Express Controller Internal CSRs at pci configuration 0x400 to 0x6FF .</P><P>Is there a public descriptions of that registers may it only be used for debug purpose.&nbsp;</P><P></P><P>Micha</P></BODY></HTML> Tue, 08 Aug 2017 14:42:47 GMT https://community.nxp.com/t5/P-Series/PCI-Express-Controller-Internal-CSRs/m-p/669629#M4075 michayardeny 2017-08-08T14:42:47Z Re: PCI Express Controller Internal CSRs https://community.nxp.com/t5/P-Series/PCI-Express-Controller-Internal-CSRs/m-p/669630#M4076 <HTML><HEAD></HEAD><BODY><P>The implemented registers are described in the processor's RM starting from "16.11.16 LTSSM State Status Register (LTSSM_State_Status_Register)".</P></BODY></HTML> Tue, 08 Aug 2017 16:12:30 GMT https://community.nxp.com/t5/P-Series/PCI-Express-Controller-Internal-CSRs/m-p/669630#M4076 ufedor 2017-08-08T16:12:30Z