topic Re: Problem in configurating eTSEC2 to RGMII mode in P-Series

Problem in configurating eTSEC2 to RGMII mode

prasantahalder — Wed, 21 Jun 2017 04:20:14 GMT

Hi,

We are using both eTSECs of P1022 in RGMII mode in our custom board. The problem we are facing is with eTSEC2 which is connected to Marvell's RGMII to Copper PHY(88E1510). From PHY LEDs and MII registers, we have found the link is up and autonegotiation complete. But when we are trying to ping from U-BOOT, we are getting "eTSEC2 : tsec: tx error" and then "eTSEC2 : tsec: tx buffers full".

We have checked the POR value of cfg_tsec1_prtc, cfg_tsec2_prtc and cfg_serdes_ports are 1, 1 and "11111" respectively. We have the following questions on this -

1. What could be the possible reason for this ping failure?

2. We have only fed 125MHz clock from a oscillator in TSEC1_GTX_CLK125. Whereas TSEC2_GTX_CLK125 is kept floating. In GUTs_PMUXCR[1588_USB_PWRFIT] is set to GPIO_1 (i.e. 11). Do we need any other registers to be set for TSEC1_GTX_CLK125 to feed both eTSEC1 and eTSEC2?

3. Another doubt is the autonegotiation result is 100BaseT FDX, whereas it should be 1000BaseT as the link partner is advertising all 10/100/1000BaseT.

Regards,

Prasanta

Re: Problem in configurating eTSEC2 to RGMII mode

ufedor — Wed, 21 Jun 2017 05:01:32 GMT

Please provide additional information:

1) PMUXCR value

2) complete raw memory dump of the initialized eTSEC2

3) which NXP Linux SDK version is used?

4) which DTS is used?

Re: Problem in configurating eTSEC2 to RGMII mode

prasantahalder — Wed, 21 Jun 2017 09:34:20 GMT

Hi,

1. PMUXCR = 0x8000_1000 and PMUXCR2 = 0xFF00_0000

2. File attached

3. SDK version 1.8

4. We are running the ping test in uboot. So, we are currently using any DTS.

Regards,

Prasanta

Re: Problem in configurating eTSEC2 to RGMII mode

ufedor — Wed, 21 Jun 2017 10:36:50 GMT

Please provide raw memory dump of the initialized eTSEC1 also.

Re: Problem in configurating eTSEC2 to RGMII mode

prasantahalder — Wed, 21 Jun 2017 11:03:05 GMT

Hi,

Please find attached the eTSEC1 dump. However we are not currently using eSEC1.

Regards,

Prasanta

Re: Problem in configurating eTSEC2 to RGMII mode

ufedor — Wed, 21 Jun 2017 12:00:11 GMT

Why Rx_EN and Tx_EN are not set in the MACCFG1?

Re: Problem in configurating eTSEC2 to RGMII mode

prasantahalder — Thu, 22 Jun 2017 04:31:46 GMT

Actually, we have taken the raw dump from uboot prompt after ping failed. During ping the MACCFG1=0x0000_0005 and MACCFG2=0000_7205.

Re: Problem in configurating eTSEC2 to RGMII mode

ufedor — Thu, 22 Jun 2017 08:03:31 GMT

Absence of Syncd_Rx_EN and Syncd_Tx_EN means that corresponding Ethernet controller does not receive its RX and TX clocks.

What is PORDEVSR value?

Re: Problem in configurating eTSEC2 to RGMII mode

prasantahalder — Fri, 07 Jul 2017 03:11:54 GMT

Thanks for your help. During debugging, we found that some of the "Misc Debug and Test Interface Pin" were set to low during reset in our board. After correcting this the eTSEC problem disappeared.

Re: Problem in configurating eTSEC2 to RGMII mode

shaileshpanchal — Fri, 08 Jun 2018 18:48:34 GMT

Hi , We are using eTSEC1 and eTSEC3 of P1020 in RGMII mode in custom board. We are facing similarly problem "eTSEC1 : tsec: tx error" and then "eTSEC1 : tsec: tx buffers full".

Please could you shared solution how you over come the above problem.

Re: Problem in configurating eTSEC2 to RGMII mode

prasantahalder — Sat, 09 Jun 2018 03:24:46 GMT

Hi Shailesh,

Check all the POR pins state during out of reset state. In our case, some "Misc Debug and Test Interface Pin" were set to low during reset in our board. It was causing the problem.

Regards,

Prasanta