topic Re: Can anyone suggest RGMII layout guidelines for P2041? in P-Series https://community.nxp.com/t5/P-Series/Can-anyone-suggest-RGMII-layout-guidelines-for-P2041/m-p/604121#M3595 <HTML><HEAD></HEAD><BODY><P>Have a great day,</P><P></P><P>See for example&nbsp;</P><P><A href="http://www.icplus.com.tw/Data/Application%20Note/IP1001%20PCB%20layout%20guideline%20Apr%2017%20V15.pdf">http://www.icplus.com.tw/Data/Application%20Note/IP1001%20PCB%20layout%20guideline%20Apr%2017%20V15.pdf</A></P><P></P><P>The P2041 RGMII implies that PC board design requires clocks to be routed such that an additional trace delay of greater than 1.5 ns is added to the associated clock signal. Many PHY vendors already incorporate the necessary delay inside their chip. If so, additional PCB delay is probably not needed.</P><P></P><P>-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Mon, 10 Oct 2016 14:57:55 GMT r8070z 2016-10-10T14:57:55Z Can anyone suggest RGMII layout guidelines for P2041? https://community.nxp.com/t5/P-Series/Can-anyone-suggest-RGMII-layout-guidelines-for-P2041/m-p/604120#M3594 <HTML><HEAD></HEAD><BODY><P>Can anyone suggest RGMII layout guidelines for P2041?</P></BODY></HTML> Tue, 04 Oct 2016 05:36:47 GMT https://community.nxp.com/t5/P-Series/Can-anyone-suggest-RGMII-layout-guidelines-for-P2041/m-p/604120#M3594 avinashh 2016-10-04T05:36:47Z Re: Can anyone suggest RGMII layout guidelines for P2041? https://community.nxp.com/t5/P-Series/Can-anyone-suggest-RGMII-layout-guidelines-for-P2041/m-p/604121#M3595 <HTML><HEAD></HEAD><BODY><P>Have a great day,</P><P></P><P>See for example&nbsp;</P><P><A href="http://www.icplus.com.tw/Data/Application%20Note/IP1001%20PCB%20layout%20guideline%20Apr%2017%20V15.pdf">http://www.icplus.com.tw/Data/Application%20Note/IP1001%20PCB%20layout%20guideline%20Apr%2017%20V15.pdf</A></P><P></P><P>The P2041 RGMII implies that PC board design requires clocks to be routed such that an additional trace delay of greater than 1.5 ns is added to the associated clock signal. Many PHY vendors already incorporate the necessary delay inside their chip. If so, additional PCB delay is probably not needed.</P><P></P><P>-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Mon, 10 Oct 2016 14:57:55 GMT https://community.nxp.com/t5/P-Series/Can-anyone-suggest-RGMII-layout-guidelines-for-P2041/m-p/604121#M3595 r8070z 2016-10-10T14:57:55Z