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    <title>topic Re: P2020 and 88E6046 communication with RGMII interface in P-Series</title>
    <link>https://community.nxp.com/t5/P-Series/P2020-and-88E6046-communication-with-RGMII-interface/m-p/521144#M3328</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please check:&lt;/P&gt;&lt;P&gt;1) quality of the EC _GTX_CLK125 referring the P2020 QorIQ Integrated Processor Hardware Specifications, 2.4.4 eTSEC Gigabit Reference Clock Timing.&lt;/P&gt;&lt;P&gt;2) the PHY documentation and its registers to ensure that internal delay for the RXC is enabled.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 12:05:18 GMT</pubDate>
    <dc:creator>ufedor</dc:creator>
    <dc:date>2016-06-15T12:05:18Z</dc:date>
    <item>
      <title>P2020 and 88E6046 communication with RGMII interface</title>
      <link>https://community.nxp.com/t5/P-Series/P2020-and-88E6046-communication-with-RGMII-interface/m-p/521143#M3327</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;Hi Dear：&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I use P2020 tsec1 RGMII port&amp;nbsp; to connect Marvell's 88E6046 switch .The 88E6046's PHY port connect to PC.The P2020 can receive data from PC,but the PC can not receive data when P2020 send data.I have tested the RGMII signal ,and not find abnormal.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 07:41:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/P2020-and-88E6046-communication-with-RGMII-interface/m-p/521143#M3327</guid>
      <dc:creator>wyt_uestc</dc:creator>
      <dc:date>2016-06-15T07:41:45Z</dc:date>
    </item>
    <item>
      <title>Re: P2020 and 88E6046 communication with RGMII interface</title>
      <link>https://community.nxp.com/t5/P-Series/P2020-and-88E6046-communication-with-RGMII-interface/m-p/521144#M3328</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please check:&lt;/P&gt;&lt;P&gt;1) quality of the EC _GTX_CLK125 referring the P2020 QorIQ Integrated Processor Hardware Specifications, 2.4.4 eTSEC Gigabit Reference Clock Timing.&lt;/P&gt;&lt;P&gt;2) the PHY documentation and its registers to ensure that internal delay for the RXC is enabled.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 12:05:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/P2020-and-88E6046-communication-with-RGMII-interface/m-p/521144#M3328</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2016-06-15T12:05:18Z</dc:date>
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