QorIQ eLBC Transfer Size

danialazo — Mon, 28 Dec 2015 15:58:18 GMT

P1020 QorIQ Integrated Processor Reference Manual, Rev. 6, 01/2013, Table 12-204 implies that with a “Word” Transfer Size and a “16-bit” Port Size, 32-bit data can be read from the 16-bit local bus, LAD[0-15]. It may also be implied that 32-bit data can be written to the 16-bit local bus, LAD[0-15].

The Port Size is set via the eLBC base registers. However, other that the statement below, I have been unable to find a way to set the Transfer Size. Please advise.

“The local bus always tries to transfer the maximum amount of data on all bus cycles”

Source: P1020 QorIQ Integrated Processor Reference Manual, Rev. 6, 01/2013, Section 12.5.3

Re: QorIQ eLBC Transfer Size

ufedor — Mon, 28 Dec 2015 18:06:36 GMT

The transfer size is determined by a SOC master initiating a transaction to a eLBC target.

This means that eLBC does not alter transfer size of internal (platform) transaction.

For example, core, executing "stw", will generate 32-bit data write transaction.

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QorIQ eLBC Transfer Size

Re: QorIQ eLBC Transfer Size